#include <fx2.h>
#include <fx2_regs.h>
#include <fx2_i2c.h>
#include <fx2_eeprom.h>
#include <tri.h>
//#include <lcd\lcd_7565r.h>

#define DATAINPTR	((BYTE xdata *)&EP1INBUF [8])
#define DATAOUTPTR	((BYTE xdata *)&EP1OUTBUF[8])


//extern BYTE fx2_i2c_read( BYTE, BYTE, BYTE xdata *);


// ================================================================================================
// EP1
//
//		Default processing of I2C and EEPROM packets. Inherited EP1 packet handlers normally
//		don't override I2C and EEPROM packet processing. They implement (most of the time) new 
//		features, which have simple data transfer only. EP1 is not intented to use for transfering 
//		large amount of data, e.g.: jtag, or LA stream.
//
//	BUF[0]	: dir[7] + command[6..0]
//	BUF[1]	: address
//	BUF[2]	: address ext
//	BUF[3]	: subaddress[lo]/eeprom page address[lo]
//	BUF[4]	: subaddress[hi]/eeprom page address[lo]
//	BUF[5]	: length (max 32)
//	BUF[6]	: offset
//	BUF[7]	: timeout in ms
// ================================================================================================
void tri_ep1out( void)
{
	bool	rd;			// true if eeprom/i2c xfer operation is read
	BYTE	cmd;		// the actual command
	
	WORD	address;	// device address + address extension
	WORD	subaddr;	// sub address for repeated start read 
	WORD	page;		// eeprom page number
	BYTE	length;		// data length
	BYTE	offset;		// offset in eeprom page
	BYTE	tmo;		// timeout
	
	// ------------------------------------------------------
	// parse command
	// ------------------------------------------------------
	rd		= EP1OUTBUF[0] & 0x80;
	cmd		= EP1OUTBUF[0] & 0x7F;

	address	= *(WORD*)&EP1OUTBUF[1];	// I2C address
	subaddr = *(WORD*)&EP1OUTBUF[3];	// sub address for RS
	page	= *(WORD*)&EP1OUTBUF[3];	// page number
	length	= *(BYTE*)&EP1OUTBUF[5];	// data length
	offset	= *(BYTE*)&EP1OUTBUF[6];	// offset in page
	tmo		= *(BYTE*)&EP1OUTBUF[7];	// timeout

	if( length > 132) 
		length = 132;
	
	// ------------------------------------------------------
	// prepare status block
	// ------------------------------------------------------
	EP1INBUF[0] = EP1OUTBUF[0];
	EP1INBUF[1] = EP1OUTBUF[1];
	EP1INBUF[2] = EP1OUTBUF[2];
	EP1INBUF[3] = EP1OUTBUF[3];
	EP1INBUF[4] = EP1OUTBUF[4];
	EP1INBUF[5] = EP1OUTBUF[5];
	EP1INBUF[6] = EP1OUTBUF[6];
	EP1INBUF[7] = I2C_OK;
	
	if(rd)
	{
		switch(cmd)
		{
			case CMD_IIC_READ:
				EP1INBUF[7] = fx2_i2c_read(  address, length, DATAINPTR);
				EP1INBC		= 8 +length;
				break;
			
			case CMD_IIC_READ_RSW:
				EP1INBUF[7] = fx2_i2c_read_rsw(	address, subaddr, length, DATAINPTR);
				EP1INBC		= 8 +length;
				break;
/*
			case 1://CMD_EEPROM_BOOT:
				EP1INBUF[7] = FX2_EEPROM_ReadPage0( 0,8, DATAINPTR);
				EP1INBC		= 8 +8;
				break;

			case 2://CMD_EEPROM_RAW:
				EP1INBUF[7]	= FX2_EEPROM_ReadPage( page, 32, DATAINPTR);
				EP1INBC		= 8 +32;
				break;
*/
			default:
				EP1INBC = 8;
		}
	}
	
	else
	{
//		*(WORD*)&EP1INBUF[6] = length;

		switch(cmd)
		{
			case CMD_IIC_WRITE:
				EP1INBUF[7] = fx2_i2c_write( address, length, DATAOUTPTR);
/*				
				lcd_gotoxy( 0, 1);
				lcd_putx2(EP1OUTBUF[0]);
				lcd_putx2(EP1OUTBUF[1]);
				lcd_putx2(EP1OUTBUF[2]);
				lcd_putx2(EP1OUTBUF[3]);
				lcd_putx2(EP1OUTBUF[4]);
				lcd_putx2(EP1OUTBUF[5]);
				lcd_putx2(EP1OUTBUF[6]);
				lcd_putx2(EP1OUTBUF[7]);
*/
				break;

			case 1://CMD_EEPROM_RAW:
				EP1INBUF[7]	= FX2_EEPROM_WritePage( page, 32, DATAOUTPTR);
				break;
		}

		EP1INBC	= 8;
	}
	
	EP1OUTBC = 0x40;	// re-arm EP1OUT	
}