103 lines
2.1 KiB
C
103 lines
2.1 KiB
C
// ============================================================================
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// FX2LP SFR Registers at 0xA0 - 0xAF
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// ----------------------------------------------------------------------------
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// 0xA0 - IOC
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// 0xA1 - INT2CLR
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// 0xA2 - INT4CLR
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// 0xA3 -
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// 0xA4 -
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// 0xA5 -
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// 0xA6 -
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// 0xA7 -
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// 0xA8 - IE
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// 0xA9 -
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// 0xAA - EP2468STAT
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// 0xAB - EP24FIFOFLGS
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// 0xAC - EP68FIFOFLGS
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// 0xAD -
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// 0xAE -
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// 0xAF - AUTOPTRSETUP
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// ============================================================================
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#ifndef FX2REGS_SFRAX_H
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#define FX2REGS_SFRAX_H
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sfr IOC = 0xA0;
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sfr INT2CLR = 0xA1;
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sfr INT4CLR = 0xA2;
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sfr IE = 0xA8;
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sfr EP2468STAT = 0xAA;
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sfr EP24FIFOFLGS= 0xAB;
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sfr EP68FIFOFLGS= 0xAC;
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sfr AUTOPTRSETUP= 0xAF;
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// ------------------------------------
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// IOC (0xA0)
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// ------------------------------------
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sbit PC0 = 0xA0 +0;
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sbit PC1 = 0xA0 +1;
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sbit PC2 = 0xA0 +2;
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sbit PC3 = 0xA0 +3;
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sbit PC4 = 0xA0 +4;
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sbit PC5 = 0xA0 +5;
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sbit PC6 = 0xA0 +6;
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sbit PC7 = 0xA0 +7;
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// ------------------------------------
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// IE (0xA8)
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// ------------------------------------
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sbit EX0 = 0xA8 +0;
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sbit ET0 = 0xA8 +1;
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sbit EX1 = 0xA8 +2;
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sbit ET1 = 0xA8 +3;
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sbit ES0 = 0xA8 +4;
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sbit ET2 = 0xA8 +5;
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sbit ES1 = 0xA8 +6;
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sbit EA = 0xA8 +7;
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// ------------------------------------
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// EP2468STAT (0xAA)
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// ------------------------------------
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#define bmEP2E 0x01
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#define bmEP2F 0x02
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#define bmEP4E 0x04
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#define bmEP4F 0x08
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#define bmEP6E 0x10
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#define bmEP6F 0x20
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#define bmEP8E 0x40
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#define bmEP8F 0x80
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// ------------------------------------
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// EP24FIFOFLGS (0XAB)
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// ------------------------------------
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#define bmEP2FF 0x01
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#define bmEP2EF 0x02
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#define bmEP2PF 0x04
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#define bmEP4FF 0x10
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#define bmEP4EF 0x20
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#define bmEP4PF 0x40
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// ------------------------------------
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// EP68FIFOFLGS (0XAC)
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// ------------------------------------
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#define bmEP6FF 0x01
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#define bmEP6EF 0x02
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#define bmEP6PF 0x04
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#define bmEP8FF 0x10
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#define bmEP8EF 0x20
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#define bmEP8PF 0x40
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// ------------------------------------
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// AUTOPTRSETUP (0xAF)
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// ------------------------------------
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#define bmAPTREN 0x01
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#define bmAPTR1INC 0x02
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#define bmAPTR2INC 0x04
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#endif
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