Initial check in

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2026-01-08 13:34:45 +01:00
commit bca620b050
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#ifndef __DVM_CLK_H__
#define __DVM_CLK_H__
void dvm_clk_init( void);
#endif
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#ifndef __DVM_TMR_H__
#define __DVM_TMR_H__
typedef void (*tmr_cb)(void);
void dvm_tmr_init(void);
void dvm_tmr0_start( void);
void dvm_tmr0_stop( void);
void dvm_tmr1_start( void);
void dvm_tmr1_stop( void);
unsigned long dvm_tmr1_count( void);
#endif
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#ifndef __DVM_TOOLS_H__
#define __DVM_TOOLS_H__
#include <dvm_types.h>
int config_read( config *cfg);
void config_write(config *cfg);
double scan35( unsigned char *b);
short scan4( unsigned char *b);
void print35( unsigned char *buf, double val, unsigned char supress_zero);
void printS35( unsigned char *buf, unsigned char sign, double val, unsigned char supress_zero);
void print4( unsigned char *buf, short val);
#endif
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#ifndef __DVM_TYPES_H__
#define __DVM_TYPES_H__
typedef unsigned char u08;
typedef unsigned short u16;
typedef struct _config
{
u16 pre; // preamble 0x2849
double vref; // reference voltage value
double div10; // divider 10 real ratio
double div100; // divider 100 real ration
short delay; // comparator and other delay fix in timer clicks (8)
u16 post; // postamble 0x2849
} config ;
#endif
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#ifndef __IODEFINE_INC__
#define __IODEFINE_INC__
#define P1 0xFFF01
#define P2 0xFFF02
#define P4 0xFFF04
#define P6 0xFFF06
#define P12 0xFFF0C
#define P13 0xFFF0D
#define SDR00 0xFFF10
#define SIO00 0xFFF10
#define TXD0 0xFFF10
#define SDR01 0xFFF12
#define RXD0 0xFFF12
#define SIO01 0xFFF12
#define TDR00 0xFFF18
#define TDR01 0xFFF1A
#define TDR01L 0xFFF1A
#define TDR01H 0xFFF1B
#define ADCR 0xFFF1E
#define ADCRH 0xFFF1F
#define PM1 0xFFF21
#define PM2 0xFFF22
#define PM4 0xFFF24
#define PM6 0xFFF26
#define ADM0 0xFFF30
#define ADS 0xFFF31
#define ADM1 0xFFF32
#define KRCTL 0xFFF34
#define KRF 0xFFF35
#define KRM0 0xFFF37
#define EGP0 0xFFF38
#define EGN0 0xFFF39
#define IICA0 0xFFF50
#define IICS0 0xFFF51
#define IICF0 0xFFF52
#define TDR02 0xFFF64
#define TDR03 0xFFF66
#define TDR03L 0xFFF66
#define TDR03H 0xFFF67
#define ITMC 0xFFF90
#define CMC 0xFFFA0
#define CSC 0xFFFA1
#define OSTC 0xFFFA2
#define OSTS 0xFFFA3
#define CKC 0xFFFA4
#define CKS0 0xFFFA5
#define RESF 0xFFFA8
#define LVIM 0xFFFA9
#define LVIS 0xFFFAA
#define WDTE 0xFFFAB
#define CRCIN 0xFFFAC
#define DSA0 0xFFFB0
#define DSA1 0xFFFB1
#define DRA0 0xFFFB2
#define DRA0L 0xFFFB2
#define DRA0H 0xFFFB3
#define DRA1 0xFFFB4
#define DRA1L 0xFFFB4
#define DRA1H 0xFFFB5
#define DBC0 0xFFFB6
#define DBC0L 0xFFFB6
#define DBC0H 0xFFFB7
#define DBC1 0xFFFB8
#define DBC1L 0xFFFB8
#define DBC1H 0xFFFB9
#define DMC0 0xFFFBA
#define DMC1 0xFFFBB
#define DRC0 0xFFFBC
#define DRC1 0xFFFBD
#define IF0 0xFFFE0
#define IF0L 0xFFFE0
#define IF0H 0xFFFE1
#define IF1 0xFFFE2
#define IF1L 0xFFFE2
#define MK0 0xFFFE4
#define MK0L 0xFFFE4
#define MK0H 0xFFFE5
#define MK1 0xFFFE6
#define MK1L 0xFFFE6
#define PR00 0xFFFE8
#define PR00L 0xFFFE8
#define PR00H 0xFFFE9
#define PR01 0xFFFEA
#define PR01L 0xFFFEA
#define PR10 0xFFFEC
#define PR10L 0xFFFEC
#define PR10H 0xFFFED
#define PR11 0xFFFEE
#define PR11L 0xFFFEE
#define MDAL 0xFFFF0
#define MULA 0xFFFF0
#define MDAH 0xFFFF2
#define MULB 0xFFFF2
#define MDBH 0xFFFF4
#define MULOH 0xFFFF4
#define MDBL 0xFFFF6
#define MULOL 0xFFFF6
#define PMC 0xFFFFE
// ----------------------------------------------------------------------------
// SFR bits
// ----------------------------------------------------------------------------
// ADM0
#define ADCE 0xFFF30.0
#define ADCS 0xFFF30.7
// IICS0
#define SPD0 0xFFF51.0
#define STD0 0xFFF51.1
#define ACKD0 0xFFF51.2
#define TRC0 0xFFF51.3
#define COI0 0xFFF51.4
#define EXC0 0xFFF51.5
#define ALD0 0xFFF51.6
#define MSTS0 0xFFF51.7
// IICF0
#define IICRSV0 0xFFF52.0
#define STCEN0 0xFFF52.1
#define IICBSY0 0xFFF52.6
#define STCF0 0xFFF52.7
// CSC
#define HIOSTOP 0xFFFA1.0
#define MSTOP 0xFFFA1.7
// CKC
#define MCM0 0xFFFA4.4
#define MCS 0xFFFA4.5
// CKS0
#define PCLOE0 0xFFFA5.7
// LVIM
#define LVIF 0xFFFA9.0
#define LVIOMSK 0xFFFA9.1
#define LVISEN 0xFFFA9.7
// LVIS
#define LVILV 0xFFFAA.0
#define LVIMD 0xFFFAA.7
// DMC0
#define DWAIT0 0xFFFBA.4
#define DS0 0xFFFBA.5
#define DRS0 0xFFFBA.6
#define STG0 0xFFFBA.7
// DMC1
#define DWAIT1 0xFFFBB.4
#define DS1 0xFFFBB.5
#define DRS1 0xFFFBB.6
#define STG1 0xFFFBB.7
// DRC0
#define DST0 0xFFFBC.0
#define DEN0 0xFFFBC.7
// DRC1
#define DST1 0xFFFBD.0
#define DEN1 0xFFFBD.7
// IF0L
#define WDTIIF 0xFFFE0.0
#define LVIIF 0xFFFE0.1
#define PIF0 0xFFFE0.2
#define PIF1 0xFFFE0.3
#define PIF2 0xFFFE0.4
#define PIF3 0xFFFE0.5
#define DMAIF0 0xFFFE0.6
#define DMAIF1 0xFFFE0.7
// IF0H
#define CSIIF00 0xFFFE1.0
#define IICIF00 0xFFFE1.0
#define STIF0 0xFFFE1.0
#define CSIIF01 0xFFFE1.1
#define IICIF01 0xFFFE1.1
#define SRIF0 0xFFFE1.1
#define SREIF0 0xFFFE1.2
#define TMIF01H 0xFFFE1.3
#define TMIF03H 0xFFFE1.4
#define IICAIF0 0xFFFE1.5
#define TMIF00 0xFFFE1.6
#define TMIF01 0xFFFE1.7
// IF1L
#define TMIF02 0xFFFE2.0
#define TMIF03 0xFFFE2.1
#define ADIF 0xFFFE2.2
#define TMKAIF 0xFFFE2.3
#define KRIF 0xFFFE2.4
#define MDIF 0xFFFE2.5
#define FLIF 0xFFFE2.6
// MK0L
#define WDTIMK 0xFFFE4.0
#define LVIMK 0xFFFE4.1
#define PMK0 0xFFFE4.2
#define PMK1 0xFFFE4.3
#define PMK2 0xFFFE4.4
#define PMK3 0xFFFE4.5
#define DMAMK0 0xFFFE4.6
#define DMAMK1 0xFFFE4.7
// MK0H
#define CSIMK00 0xFFFE5.0
#define IICMK00 0xFFFE5.0
#define STMK0 0xFFFE5.0
#define CSIMK01 0xFFFE5.1
#define IICMK01 0xFFFE5.1
#define SRMK0 0xFFFE5.1
#define SREMK0 0xFFFE5.2
#define TMMK01H 0xFFFE5.3
#define TMMK03H 0xFFFE5.4
#define IICAMK0 0xFFFE5.5
#define TMMK00 0xFFFE5.6
#define TMMK01 0xFFFE5.7
// MK1L
#define TMMK02 0xFFFE6.0
#define TMMK03 0xFFFE6.1
#define ADMK 0xFFFE6.2
#define TMKAMK 0xFFFE6.3
#define KRMK 0xFFFE6.4
#define MDMK 0xFFFE6.5
#define FLMK 0xFFFE6.6
// PR00L
#define WDTIPR0 0xFFFE8.0
#define LVIPR0 0xFFFE8.1
#define PPR00 0xFFFE8.2
#define PPR01 0xFFFE8.3
#define PPR02 0xFFFE8.4
#define PPR03 0xFFFE8.5
#define DMAPR00 0xFFFE8.6
#define DMAPR01 0xFFFE8.7
// PR00H
#define CSIPR000 0xFFFE9.0
#define IICPR000 0xFFFE9.0
#define STPR00 0xFFFE9.0
#define CSIPR001 0xFFFE9.1
#define IICPR001 0xFFFE9.1
#define SRPR00 0xFFFE9.1
#define SREPR00 0xFFFE9.2
#define TMPR001H 0xFFFE9.3
#define TMPR003H 0xFFFE9.4
#define IICAPR00 0xFFFE9.5
#define TMPR000 0xFFFE9.6
#define TMPR001 0xFFFE9.7
// PR01L
#define TMPR002 0xFFFEA.0
#define TMPR003 0xFFFEA.1
#define ADPR0 0xFFFEA.2
#define TMKAPR0 0xFFFEA.3
#define KRPR0 0xFFFEA.4
#define MDPR0 0xFFFEA.5
#define FLPR0 0xFFFEA.6
// PR10L
#define WDTIPR1 0xFFFEC.0
#define LVIPR1 0xFFFEC.1
#define PPR10 0xFFFEC.2
#define PPR11 0xFFFEC.3
#define PPR12 0xFFFEC.4
#define PPR13 0xFFFEC.5
#define DMAPR10 0xFFFEC.6
#define DMAPR11 0xFFFEC.7
// PR10H
#define CSIPR100 0xFFFED.0
#define IICPR100 0xFFFED.0
#define STPR10 0xFFFED.0
#define CSIPR101 0xFFFED.1
#define IICPR101 0xFFFED.1
#define SRPR10 0xFFFED.1
#define SREPR10 0xFFFED.2
#define TMPR101H 0xFFFED.3
#define TMPR103H 0xFFFED.4
#define IICAPR10 0xFFFED.5
#define TMPR100 0xFFFED.6
#define TMPR101 0xFFFED.7
// PR11L
#define TMPR102 0xFFFEE.0
#define TMPR103 0xFFFEE.1
#define ADPR1 0xFFFEE.2
#define TMKAPR1 0xFFFEE.3
#define KRPR1 0xFFFEE.4
#define MDPR1 0xFFFEE.5
#define FLPR1 0xFFFEE.6
#define MAA 0xFFFFE.0
#endif
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#ifndef __IODEFINE_EXT_H__
#define __IODEFINE_EXT_H__
#define ADM2 0xF0010
#define ADUL 0xF0011
#define ADLL 0xF0012
#define ADTES 0xF0013
#define PU1 0xF0031
#define PU4 0xF0034
#define PU12 0xF003C
#define PIM1 0xF0041
#define POM1 0xF0051
#define POM4 0xF0054
#define PMC1 0xF0061
#define PMC4 0xF0064
#define NFEN0 0xF0070
#define NFEN1 0xF0071
#define ISC 0xF0073
#define TIS0 0xF0074
#define ADPC 0xF0076
#define PIOR 0xF0077
#define IAWCTL 0xF0078
#define DFLCTL 0xF0090
#define HIOTRM 0xF00A0
#define HOCODIV 0xF00A8
#define TEMPCAL0 0xF00AC
#define TEMPCAL1 0xF00AD
#define TEMPCAL2 0xF00AE
#define TEMPCAL3 0xF00AF
#define MDCL 0xF00E0
#define MDCH 0xF00E2
#define MDUC 0xF00E8
#define PER0 0xF00F0
#define OSMC 0xF00F3
#define RMC 0xF00F4
#define RPECTL 0xF00F5
#define BCDADJ 0xF00FE
#define SSR00 0xF0100
#define SSR00L 0xF0100
#define SSR01 0xF0102
#define SSR01L 0xF0102
#define SIR00 0xF0108
#define SIR00L 0xF0108
#define SIR01 0xF010A
#define SIR01L 0xF010A
#define SMR00 0xF0110
#define SMR01 0xF0112
#define SCR00 0xF0118
#define SCR01 0xF011A
#define TCR00 0xF0180
#define TCR01 0xF0182
#define TCR02 0xF0184
#define TCR03 0xF0186
#define TMR00 0xF0190
#define TMR01 0xF0192
#define TMR02 0xF0194
#define TMR03 0xF0196
#define TSR00 0xF01A0
#define TSR00L 0xF01A0
#define TSR01 0xF01A2
#define TSR01L 0xF01A2
#define TSR02 0xF01A4
#define TSR02L 0xF01A4
#define TSR03 0xF01A6
#define TSR03L 0xF01A6
#define SE0 0xF0120
#define SE0L 0xF0120
#define SS0 0xF0122
#define SS0L 0xF0122
#define ST0 0xF0124
#define ST0L 0xF0124
#define SPS0 0xF0126
#define SPS0L 0xF0126
#define SO0 0xF0128
#define SOE0 0xF012A
#define SOE0L 0xF012A
#define SOL0 0xF0134
#define SOL0L 0xF0134
#define SSC0 0xF0138
#define SSC0L 0xF0138
#define TE0 0xF01B0
#define TE0L 0xF01B0
#define TS0 0xF01B2
#define TS0L 0xF01B2
#define TT0 0xF01B4
#define TT0L 0xF01B4
#define TPS0 0xF01B6
#define TO0 0xF01B8
#define TO0L 0xF01B8
#define TOE0 0xF01BA
#define TOE0L 0xF01BA
#define TOL0 0xF01BC
#define TOL0L 0xF01BC
#define TOM0 0xF01BE
#define TOM0L 0xF01BE
#define IICCTL00 0xF0230
#define IICCTL01 0xF0231
#define IICWL0 0xF0232
#define IICWH0 0xF0233
#define SVA0 0xF0234
#define CRCD 0xF02FA
// ADM2
#define ADTYP 0xF0010.0
#define AWC 0xF0010.2
#define ADRCK 0xF0010.3
// DFLCTL
#define DFLEN 0xF0090.0
// MDUC
#define DIVST 0xF00E8.0
#define MACSF 0xF00E8.1
#define MACOF 0xF00E8.2
#define MDSM 0xF00E8.3
#define MACMODE 0xF00E8.6
#define DIVMODE 0xF00E8.7
// PER0
#define TAU0EN 0xF00F0.0
#define SAU0EN 0xF00F0.2
#define IICA0EN 0xF00F0.4
#define ADCEN 0xF00F0.5
#define TMKAEN 0xF00F0.7
// RMC
#define WDVOL 0xF00F4.7
// RPECTL
#define RPEF 0xF00F5.0
#define RPERDIS 0xF00F5.7
// IICCTL00
#define SPT0 0xF0230.0
#define STT0 0xF0230.1
#define ACKE0 0xF0230.2
#define WTIM0 0xF0230.3
#define SPIE0 0xF0230.4
#define WREL0 0xF0230.5
#define LREL0 0xF0230.6
#define IICE0 0xF0230.7
// IICCTL01
#define PRS0 0xF0231.0
#define DFC0 0xF0231.2
#define SMC0 0xF0231.3
#define DAD0 0xF0231.4
#define CLD0 0xF0231.5
#define WUP0 0xF0231.7
#endif
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#ifndef __MR_FDL_H__
#define __MR_FDL_H__
#include <pfdl.h>
#include <pfdl_types.h>
pfdl_status_t mfdl_handler( void);
pfdl_status_t mfdl_open( void);
void mfdl_close( void);
pfdl_status_t mfdl_erase( pfdl_u16 block);
pfdl_status_t mfdl_check( pfdl_u16 index, pfdl_u16 length);
pfdl_status_t mfdl_verify(pfdl_u16 index, pfdl_u16 length);
pfdl_status_t mfdl_read( pfdl_u16 index, pfdl_u16 length, __near pfdl_u08* data);
pfdl_status_t mfdl_write( pfdl_u16 index, pfdl_u16 length, __near pfdl_u08* data);
#endif
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/**********************************************************************************************************************
Program Name : Flash Data Library T04 (PicoFDL)
File Name : pfdl.h
Program Version : V1.05 (for LLVM)
Device(s) : RL78/x1x
Description : C language API definition of the Flash Data Library
**********************************************************************************************************************/
/**********************************************************************************************************************
DISCLAIMER
This software is supplied by Renesas Electronics Corporation and is only intended for use with
Renesas products. No other uses are authorized. This software is owned by Renesas Electronics
Corporation and is protected under all applicable laws, including copyright laws.
THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE,
WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR
ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR
CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
Renesas reserves the right, without notice, to make changes to this software and to discontinue the
availability of this software. By using this software, you agree to the additional terms and conditions
found by accessing the following link:
http://www.renesas.com/disclaimer
Copyright (C) 2023 Renesas Electronics Corporation. All rights reserved.
**********************************************************************************************************************/
#ifndef __PFDL_H_INCLUDED
#define __PFDL_H_INCLUDED
/*================================================================================================*/
/* include files list */
/*================================================================================================*/
#include "pfdl_types.h"
/* ---------------------------------------------------------------------------------------------------------------*/
/* Block type: standard function */
/* ---------------------------------------------------------------------------------------------------------------*/
/* Purpose: Unconditional activation of the Data Flash Library. */
/* Based on the descriptor data: */
/* - the flash firmware will be initialized for data-flash access only */
/* - the internal timing and low-voltage capability will be configured according to the descriptor */
/* After successful initialization the data flash clock is ON and the PFDL is ready to use. */
/* */
/* CAUTION: */
/* Due to the code size minimization no plausibility checks are done by the PicoFDL. */
/* Neither configuration, frequency range nor data flash size will be checked by the library. */
/* */
/* Input: address of the PFDL descriptor variable (RAM only) */
/* Output: - */
/* Return: PFDL status */
/* ---------------------------------------------------------------------------------------------------------------*/
extern pfdl_status_t __far PFDL_Open(__near pfdl_descriptor_t* descriptor_pstr) __attribute__ ((section ("PFDL_COD")));
/* ---------------------------------------------------------------------------------------------------------------*/
/* Block type: standard function */
/* ---------------------------------------------------------------------------------------------------------------*/
/* Purpose: Disable data flash access unconditionally. */
/* If any command is just executed, PFDL_Close will stop it immediately. */
/* After return the data flash clock is switched OFF. */
/* Input: - */
/* Output: - */
/* Return: - */
/* ---------------------------------------------------------------------------------------------------------------*/
extern void __far PFDL_Close(void) __attribute__ ((section ("PFDL_COD")));
/* ---------------------------------------------------------------------------------------------------------------*/
/* Block type: standard function */
/* ---------------------------------------------------------------------------------------------------------------*/
/* Purpose: Initiating execution of the PFDL request related to the data flash. */
/* The corresponding request variable has to be parametrized before. */
/* */
/* request_pstr->index_u16 : byte-index or block-number within PFDL-pool */
/* request_pstr->data_pu08 : start address of the RAM data that should be read/written */
/* request_pstr->bytecount_u16 : number of bytes has to be read/written */
/* request_pstr->command_enu : command code */
/* */
/* CAUTION: */
/* Due to the code size minimization no plausibility checks are done by the PFDL. */
/* */
/* Input: &request_pstr - pointer to PFDL request variable */
/* Output: - */
/* Return: status of the request */
/* ---------------------------------------------------------------------------------------------------------------*/
extern pfdl_status_t __far PFDL_Execute(__near pfdl_request_t* request_pstr) __attribute__ ((section ("PFDL_COD")));
/* ---------------------------------------------------------------------------------------------------------------*/
/* Block type: standard function */
/* ---------------------------------------------------------------------------------------------------------------*/
/* Purpose: Continuation of command execution and status update of requests being under execution. */
/* Input: - */
/* Output: - */
/* Return: PFDL status = */
/* PFDL_IDLE - no request is processed by PFDL, PFDL is ready to receive new requests */
/* PFDL_OK - processed request/command finished without problems */
/* PFDL_BUSY - request/command is still being processed */
/* other - flash or firmware related errors */
/* ---------------------------------------------------------------------------------------------------------------*/
extern pfdl_status_t __far PFDL_Handler(void) __attribute__ ((section ("PFDL_COD")));
/* ---------------------------------------------------------------------------------------------------------------*/
/* Block type: standard function */
/* ---------------------------------------------------------------------------------------------------------------*/
/* Purpose: Returns the start address of the library version string */
/* */
/* Input: - */
/* Output: - */
/* Return: starting address of the zero-terminated version string */
/* ---------------------------------------------------------------------------------------------------------------*/
extern __far pfdl_u08* __far PFDL_GetVersionString(void) __attribute__ ((section ("PFDL_COD")));
#endif
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/**********************************************************************************************************************
Program Name : Flash Data Library T04 (PicoFDL)
File Name : pfdl_asm.h
Program Version : V1.05 (for LLVM)
Device(s) : RL78/x1x
Description : Preprocessor defines for library usage from assembler
**********************************************************************************************************************/
/**********************************************************************************************************************
DISCLAIMER
This software is supplied by Renesas Electronics Corporation and is only intended for use with
Renesas products. No other uses are authorized. This software is owned by Renesas Electronics
Corporation and is protected under all applicable laws, including copyright laws.
THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE,
WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR
ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR
CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
Renesas reserves the right, without notice, to make changes to this software and to discontinue the
availability of this software. By using this software, you agree to the additional terms and conditions
found by accessing the following link:
http://www.renesas.com/disclaimer
Copyright (C) 2023 Renesas Electronics Corporation. All rights reserved.
**********************************************************************************************************************/
#ifndef __PFDL_ASM_H_INCLUDED
#define __PFDL_ASM_H_INCLUDED
/* PFDL command code set as used for pfdl_command_t */
/* ---------------------------------------------- */
#define PFDL_CMD_READ_BYTES (0x00) /* 0x00, reads data from flash memory */
#define PFDL_CMD_IVERIFY_BYTES (0x06) /* 0x06, verifies data if flash content is stable */
#define PFDL_CMD_BLANKCHECK_BYTES (0x08) /* 0x08, checks if flash content is blank */
#define PFDL_CMD_WRITE_BYTES (0x04) /* 0x04, writes data into flash memory */
#define PFDL_CMD_ERASE_BLOCK (0x03) /* 0x03, erases one flash block */
/* ---------------------------------------------- */
/* PFDL error code set as used for pfdl_status_t */
/* operation related status */ /* ---------------------------------------------- */
#define PFDL_IDLE (0x30) /* 0x30, PFDL ready to receive requests */
#define PFDL_OK (0x00) /* 0x00, command finished without problems */
#define PFDL_BUSY (0xFF) /* 0xFF, command is being processed */
/* flash related status */ /* ---------------------------------------------- */
#define PFDL_ERR_PROTECTION (0x10) /* 0x10, protection error (access right conflict) */
#define PFDL_ERR_ERASE (0x1A) /* 0x1A, erase error */
#define PFDL_ERR_MARGIN (0x1B) /* 0x1B, blankcheck or verify margin violated */
#define PFDL_ERR_WRITE (0x1C) /* 0x1C, write error */
#define PFDL_ERR_PARAMETER (0x05) /* 0x05, parameter error */
/* ---------------------------------------------- */
#endif
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/**********************************************************************************************************************
Program Name : Flash Data Library T04 (PicoFDL)
File Name : pfdl_types.h
Program Version : V1.05 (for LLVM)
Device(s) : RL78/x1x
Description : Type definitions used by the library
**********************************************************************************************************************/
/**********************************************************************************************************************
DISCLAIMER
This software is supplied by Renesas Electronics Corporation and is only intended for use with
Renesas products. No other uses are authorized. This software is owned by Renesas Electronics
Corporation and is protected under all applicable laws, including copyright laws.
THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE,
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Copyright (C) 2023 Renesas Electronics Corporation. All rights reserved.
**********************************************************************************************************************/
#ifndef __PFDL_TYPES_H_INCLUDED
#define __PFDL_TYPES_H_INCLUDED
/*==============================================================================================*/
/* unsigned type definitions */
/*==============================================================================================*/
typedef unsigned char pfdl_u08;
typedef unsigned int pfdl_u16;
typedef unsigned long int pfdl_u32;
/*==============================================================================================*/
/* global constant definitions */
/*==============================================================================================*/
/*==============================================================================================*/
/* global type definitions */
/*==============================================================================================*/
/* PFDL command code set */
typedef enum
{ /* ---------------------------------------------- */
PFDL_CMD_READ_BYTES = (0x00), /* 0x00, reads data from flash memory */
PFDL_CMD_IVERIFY_BYTES = (0x06), /* 0x06, verifies data if flash content is stable */
PFDL_CMD_BLANKCHECK_BYTES = (0x08), /* 0x08, checks if flash content is blank */
PFDL_CMD_WRITE_BYTES = (0x04), /* 0x04, writes data into flash memory */
PFDL_CMD_ERASE_BLOCK = (0x03) /* 0x03, erases one flash block */
} __attribute__ ((__packed__)) pfdl_command_t; /* ---------------------------------------------- */
/* PFDL error code set */
typedef enum
{
/* operation related status */ /* ---------------------------------------------- */
PFDL_IDLE = (0x30), /* 0x30, PFDL ready to receive requests */
PFDL_OK = (0x00), /* 0x00, command finished without problems */
PFDL_BUSY = (0xFF), /* 0xFF, command is being processed */
/* flash related status */ /* ---------------------------------------------- */
PFDL_ERR_PROTECTION = (0x10), /* 0x10, protection error (access right conflict) */
PFDL_ERR_ERASE = (0x1A), /* 0x1A, erase error */
PFDL_ERR_MARGIN = (0x1B), /* 0x1B, blankcheck or verify margin violated */
PFDL_ERR_WRITE = (0x1C), /* 0x1C, write error */
PFDL_ERR_PARAMETER = (0x05) /* 0x05, parameter error */
} __attribute__ ((__packed__)) pfdl_status_t; /* ---------------------------------------------- */
/* PFDL request type (base type for any PFDL access) */
typedef struct
{ /* ---------------------------------------------- */
pfdl_u16 index_u16; /* 2, W, virt. byte/block index inside PFDL-pool */
__near pfdl_u08* data_pu08; /* 2, W, pointer to the 1'st byte of data buffer */
pfdl_u16 bytecount_u16; /* 2, W, number of bytes to be transferred */
pfdl_command_t command_enu; /* 1, W, command code */
} pfdl_request_t; /*------------------------------------------------*/
/* 7 bytes in total */
/*------------------------------------------------*/
/* PFDL descriptor type */
typedef struct
{ /* ---------------------------------------------- */
pfdl_u08 fx_MHz_u08; /* 1, system frequency expressed in MHz */
pfdl_u08 wide_voltage_mode_u08; /* 1, programming voltage mode ( full/wide ) */
} pfdl_descriptor_t; /*------------------------------------------------*/
/* 2 bytes in total */
/*==============================================================================================*/
/* type definition plausibility check */
/*==============================================================================================*/
/* The following checks are implemented in order to check the correct size of the FDL type */
/* definitions at compile time. In case of a compilation error in the following lines, please */
/* check your compiler options for enumeration types and structures and contact your local */
/* support, if necessary. */
#define R_PFDLT04_STATIC_ASSERT_SIZE(a, b) (1/(sizeof(a) == (unsigned int)(b)))
#define R_PFDLT04_STATIC_ASSERT_RANGE(a, b, c) ((1/(sizeof(a) >= (unsigned int)(b))) * (1/(sizeof(a) <= (unsigned int)(c))))
enum
{
R_PFDLT04_ASSERT_CHECK
= R_PFDLT04_STATIC_ASSERT_SIZE(pfdl_u08, 1) /* Check unsigned type */
+ R_PFDLT04_STATIC_ASSERT_SIZE(pfdl_u16, 2) /* Check unsigned type */
+ R_PFDLT04_STATIC_ASSERT_SIZE(pfdl_u32, 4) /* Check unsigned type */
+ R_PFDLT04_STATIC_ASSERT_SIZE(pfdl_command_t, 1) /* Check enumeration type */
+ R_PFDLT04_STATIC_ASSERT_SIZE(pfdl_status_t, 1) /* Check enumeration type */
+ R_PFDLT04_STATIC_ASSERT_RANGE(pfdl_request_t, 7, 8) /* Check packed/unpacked structure type */
+ R_PFDLT04_STATIC_ASSERT_SIZE(pfdl_descriptor_t, 2) /* Check structure type */
};
#endif