From 44c68d04f9bb30ffaa9cbba283c941dda5b0fcfa Mon Sep 17 00:00:00 2001 From: Roka Miklos Date: Fri, 26 Jun 2026 16:59:08 +0200 Subject: [PATCH] Added the generic include components. It scans model folders to add items to a simulation. --- circuit/ael/mrmodels_include.ael | 134 ++++++++++++++++++ de/ael/boot.ael | 3 +- mrModels/eesof_lib.cfg | 2 +- .../schematic/master.tag | 0 .../schematic/sch.oa | Bin 21316 -> 21404 bytes .../symbol/master.tag | 0 .../symbol/symbol.oa | Bin 14892 -> 15852 bytes mrModels_tech/eesof_lib.cfg | 2 +- 8 files changed, 137 insertions(+), 4 deletions(-) create mode 100644 circuit/ael/mrmodels_include.ael rename mrModels/{netlistinclude => mrmodels_include}/schematic/master.tag (100%) rename mrModels/{netlistinclude => mrmodels_include}/schematic/sch.oa (84%) rename mrModels/{netlistinclude => mrmodels_include}/symbol/master.tag (100%) rename mrModels/{netlistinclude => mrmodels_include}/symbol/symbol.oa (59%) diff --git a/circuit/ael/mrmodels_include.ael b/circuit/ael/mrmodels_include.ael new file mode 100644 index 0000000..1df651c --- /dev/null +++ b/circuit/ael/mrmodels_include.ael @@ -0,0 +1,134 @@ +defun scan_folder_va( folder) +{ + decl modelFileList; + decl net = ""; + decl file; + decl path; + + + // ---------------------------------------------------- + // Collect veriloga model files in the specified folder + // ---------------------------------------------------- + modelFileList = get_dir_files(folder,"va"); + + while( is_list(modelFileList)) + { + file = car(modelFileList); + path = strcat(folder,file); + net = strcat(net,sprintf("#load \"veriloga\", \"%s\"\n",path)); + + modelFileList = cdr( modelFileList); + } + + // ---------------------------------------------------- + // scan sub folders + // ---------------------------------------------------- + modelFileList = get_dir_files(folder); + + while( is_list(modelFileList)) + { + file = car(modelFileList); + path = strcat(folder,file); + + if( is_dir(path) == TRUE) + if( file != "." && file != "..") + net = strcat(net,scan_folder_va(strcat(path,"/"))); + + modelFileList = cdr( modelFileList); + } + + return net; +} + +defun scan_folder( folder, ext) +{ + decl modelFileList; + decl net = ""; + decl file; + decl path; + + + // ---------------------------------------------------- + // Collect models in the specified folder + // ---------------------------------------------------- + modelFileList = get_dir_files(folder,"mod"); + + while( is_list(modelFileList)) + { + file = car(modelFileList); + path = strcat(folder,file); + net = strcat(net,sprintf("#include \"%s\"\n",path)); + + modelFileList = cdr( modelFileList); + } + + modelFileList = get_dir_files(folder,"net"); + + while( is_list(modelFileList)) + { + file = car(modelFileList); + path = strcat(folder,file); + net = strcat(net,sprintf("#include \"%s\"\n",path)); + + modelFileList = cdr( modelFileList); + } + + // ---------------------------------------------------- + // scan sub folders + // ---------------------------------------------------- + modelFileList = get_dir_files(folder); + + while( is_list(modelFileList)) + { + file = car(modelFileList); + path = strcat(folder,file); + + if( is_dir(path) == TRUE) + if( file != "." && file != "..") + net = strcat(net,scan_folder(strcat(path,"/"),ext)); + + modelFileList = cdr( modelFileList); + } + + return net; +} + +defun mrModels_process_netlist_cb( cbP, cbData, instH) +{ + decl net = ""; + + net = strcat(net,"; models\n"); + net = strcat(net,scan_folder(MRMODELS_DIR_CIRCUIT_MODELS,"")); + + net = strcat(net, "; veriloga models\n"); + net = strcat(net,scan_folder_va(MRMODELS_DIR_VERILOGA)); + + fprintf(stderr, "%s",net); + return net; +} + +// ---------------------------------------------------------------------------- +// Item definition +// ---------------------------------------------------------------------------- +create_item( "mrmodels_include", // name + "Process Netlist Include", // description label + "NetlistInclude", // prefix + ITEM_UNIQUE | ITEM_GLOBAL, // attributes + NULL, // priority + NULL, // iconName + standard_dialog, // dialogName + NULL, // dialogData + ComponentNetlistFmt, // netlist format string + NULL, // netlist data + ComponentAnnotFmt, // display format string + NULL, // symbol name + NULL, // artwork type + NULL, // artwork data + ITEM_PRIMITIVE_EX, // extra attributes + + list( + dm_create_cb( ITEM_NETLIST_CB, + "mrModels_process_netlist_cb", + "", + TRUE)) +); diff --git a/de/ael/boot.ael b/de/ael/boot.ael index 48877cf..bbf5e53 100644 --- a/de/ael/boot.ael +++ b/de/ael/boot.ael @@ -22,8 +22,7 @@ fprintf(stderr, "Loading %s design kit\n", MRMODELS_NAME); // Load // ---------------------------------------------------------------------------- load( strcat( MRMODELS_DIR_DE_AEL, "palette" )); - -////load( strcat( MRMODELS_DIR_CIRCUIT_AEL, "mrmodels_include" )); +load( strcat( MRMODELS_DIR_CIRCUIT_AEL, "mrmodels_include" )); // load( strcat( MRMODELS_DIR_CIRCUIT_AEL, "sample_fet" )); diff --git a/mrModels/eesof_lib.cfg b/mrModels/eesof_lib.cfg index b2eeb7b..9aeaca3 100644 --- a/mrModels/eesof_lib.cfg +++ b/mrModels/eesof_lib.cfg @@ -14,4 +14,4 @@ DOC_DIRECTORY = ../doc DRC_DIRECTORY = ../drc/rules NETLIST_EXPORTER_DIRECTORY= ../netlist_exp BIN_DIRECTORY = ../bin/$SIMARCH$COMPILER_VER -DEFAULTS_DESIGNS = mrModels:netlistinclude:schematic +DEFAULTS_DESIGNS=mrModels:mrmodels_include:schematic diff --git a/mrModels/netlistinclude/schematic/master.tag b/mrModels/mrmodels_include/schematic/master.tag similarity index 100% rename from mrModels/netlistinclude/schematic/master.tag rename to mrModels/mrmodels_include/schematic/master.tag diff --git a/mrModels/netlistinclude/schematic/sch.oa b/mrModels/mrmodels_include/schematic/sch.oa similarity index 84% rename from mrModels/netlistinclude/schematic/sch.oa rename to mrModels/mrmodels_include/schematic/sch.oa index e7ba8130682cb4fd098395cfad20fc89964c1141..189a4228a4fb4307234b755598560b71838a1aa7 100644 GIT binary patch delta 832 zcmX@IjB(C##tjvW^$B7OU{D|qrWiD&A+(1agnpp{p$oJjbc8;H<}ilPAIu^2e<)yZ zgz#55L+A*12+iOPp;!1p=o!Iadh&P1OvMw7U^asQl-|J%;VVGt1)Ce0?sEy5K|~ph zCfa3zm_`#f7x7B53xZq#vK=JGz{J3?W%FE-iHwH1MZWndsX4`Zxkb5PMto*oa!zSV zs$OwrZc=^@1G@NReX&MHj>#Lv^cf{4KNM4+?BL0w#|}1?fdOj42}TG2iJo9$U|?Wk zSitax;TMAf<1!`>=FL{(dK{iFpzh{j0V!i(kbu%EP}%@W+dyd#C_Mv8FM-l4CU2B4 zpPXSLF!_hH24leHLR5 z$Rs{_gANDdgUJt>{3knjDok$h_oOcoSZH)3O8 zU;tr|La2rlj9>r~VK~9Wz`(%7uz=wW!!HH}#$`+l44bpW^*B6lK;7{MO8jNS1Em`#Ka?-$6oF`B5SgqfqtEEEd7^?i!$`HjMh4_o`3k z9fgzaz2AUZd7$g`N7#N`fS`#Jx8962B!_VZYd8o1~!HXObiT0MtWw3dIbiC5R0LF10$$=7{W92jKORc1_nc@ z!A2A9vOr7_z4;1v49jE#K8wj20tJ&3^dwkWm>3usCd(Q+OHKkQVqj=k3Z;FZ4o#TM zC@(&_!O(zH10us9GWnr~`D6tlfyo~XIVL-pb4;@0m}I2m2-69R4v^7MQyD-p0@BV5 zA{ZDLplZS5Aa!8z$+kw?svw>)J2*TJfSdrrI~f?jD#4l=85pikek!ogJvFsBKP@b^ zs5mn}&#yE$DYb|JStz)qC^Ije!O9ko7l^XhfNTPZK;3!*$_LXRSApbU(Z&N60HqiKP!KlCh)=#RsX6(9kj7*OF^L42 z0s*K(5hyJIrDdSB3Y0d0(l$`q1xg1%=?Ewt1EnV$3MfpzVW}{Ag7AdN2236xAGknW z3=69hAQv+*Fo1nf1>u0%5GDhPJXG(A%^4yKm_eo)Kt-^c29<-G05Wm1gM`B5011}O z2@)R6lLa(be891ah&#AyknR`nUVt>60QpCRfs>I7BnWk@AQMOw;%-JJu*8YUKct-) z88=(Y>}8&0$WjkhfYWG@$x!WJ-Ndt*AqInki4lw5|NsBj|NsAg@?ixT#uJnGC@90o z%?}hLm?UL5z*aL%;DpdEToAfsvY>LfBm=~7h7yRu3|}CU3?DW(Dqm+55n^Cq0AY|Q zED=u5QI+O|2i)Wds?v-nHm_0TU}Wr=EGQ$s`HWf)(UO7EL<})xfL`+W9lxAd}T&pQA2#YC@6v%Nxlb32HPfoEEnB1dXGPy%bL4=oq zfdPa;D&USgptWZ*hgQQR9fipTOe`SN1wgt{)R^elOg7OF*j%H-!pN92d7-E>Mmh!Q z$pC4B#y_;YJrT>mz;NdO|No#g3=KL&P`uHVnd~6LGC4trWiyZ75=M~iIMXb|aCnM` zav4r+exe`2#0&F1$Q_KEJ&pXCK!%xsxFD4x~*KC$_Ni3B+Ngg{lm tvk!<5!Z2MeAoUEGPJ#%-NpMPpd498l#R;%S6`&@;O^2&zU|;}Ms{oE@Pj~9fgzaz1}YgC7{nMD7#Jri`cJG#kSyVb$v|is2*uzt@uPTs43zU9 z3R0l_A1n|?3M+(uAON8|1fjGLggzk(p*KiEXbo8iEuaLU6Z9Z-ff0mOFoVzdw%vA=HKN_h|J|Mv{`2nMVB-9lQE5NEjo`NtOCJQpjGx}^cWGdyHoW&#M!otA9 zaFT(A!N^F@#8A(`0BRkaZvxTB5T2Q543=YIP%va*U{HE9HxMLc`DSk5<}*AoER&at z2~XZ2#({y81#@{pfdo>`z{tQbY4TR#g_Gxr+_L0AxQhX*;s7I983UMRg0LB2o|yub z6qx+c(qM9=g!tqSsvMKV6cS((GoT9QKy%mE-1m_fn}4Dir{a=~tR@$LnPdjJ%QA`G02To5C{a)L}CQAj8=GJz!yOzx0( zn!L}DYjOe;%VYr=md$tM*D%+EYyqpqX$!~_s7YXhh-WiH3M)3#wmd6j5Mc zV1Q;rc*sruqan=+kFUuJn$nC1Hrr@&Fiu_|FR?jBD~FNS1Zo-&0|Nus z#lF{|B)lk%36FlUEqZY(8PQf)Q_8g%}Fg1?4gv*u2Czf{BrFa;mWQ zW(_j~CJSs%hpGlU3FJhOGe9&5!{jzku#jMmz@{6d3WQ<0S|D0rkqF^2U^)$?2j