From 5c458d5a638fbce353be5b176fa9bda61ee97066 Mon Sep 17 00:00:00 2001
From: Roka Miklos <miklos.roka@gmail.com>
Date: Mon, 29 Jun 2026 10:58:24 +0200
Subject: [PATCH] Added resistor component with 3 different simulation model
 including Verilog-A

---
 circuit/ael/mr/mr_resistor.ael                | 160 ++++++++++++++++++
 mrModels/mr_pas_r/schematic/master.tag        |   2 +
 mrModels/mr_pas_r/schematic/sch.oa            | Bin 0 -> 34668 bytes
 .../mr_pas_r/schematic_parasitic/master.tag   |   2 +
 mrModels/mr_pas_r/schematic_parasitic/sch.oa  | Bin 0 -> 34940 bytes
 .../mr_pas_r/schematic_veriloga/master.tag    |   2 +
 mrModels/mr_pas_r/schematic_veriloga/sch.oa   | Bin 0 -> 34820 bytes
 mrModels/mr_pas_r/symbol/master.tag           |   2 +
 mrModels/mr_pas_r/symbol/symbol.oa            | Bin 0 -> 25596 bytes
 mrModels/mr_pas_r_va/symbol/master.tag        |   2 +
 mrModels/mr_pas_r_va/symbol/symbol.oa         | Bin 0 -> 25604 bytes
 mrModels/mr_pas_r_va/veriloga/master.tag      |   2 +
 mrModels/mr_pas_r_va/veriloga/veriloga.va     |  43 +++++
 13 files changed, 215 insertions(+)
 create mode 100644 circuit/ael/mr/mr_resistor.ael
 create mode 100644 mrModels/mr_pas_r/schematic/master.tag
 create mode 100644 mrModels/mr_pas_r/schematic/sch.oa
 create mode 100644 mrModels/mr_pas_r/schematic_parasitic/master.tag
 create mode 100644 mrModels/mr_pas_r/schematic_parasitic/sch.oa
 create mode 100644 mrModels/mr_pas_r/schematic_veriloga/master.tag
 create mode 100644 mrModels/mr_pas_r/schematic_veriloga/sch.oa
 create mode 100644 mrModels/mr_pas_r/symbol/master.tag
 create mode 100644 mrModels/mr_pas_r/symbol/symbol.oa
 create mode 100644 mrModels/mr_pas_r_va/symbol/master.tag
 create mode 100644 mrModels/mr_pas_r_va/symbol/symbol.oa
 create mode 100644 mrModels/mr_pas_r_va/veriloga/master.tag
 create mode 100644 mrModels/mr_pas_r_va/veriloga/veriloga.va

diff --git a/circuit/ael/mr/mr_resistor.ael b/circuit/ael/mr/mr_resistor.ael
new file mode 100644
index 0000000..0ef1b8a
--- /dev/null
+++ b/circuit/ael/mr/mr_resistor.ael
@@ -0,0 +1,160 @@
+// ============================================================================
+// Resitor item definition
+// ============================================================================
+create_item(
+    "mr_pas_r",                                 // name
+    "Resistor (Custom Symbol)",                 // label
+    "R",                                        // prefix
+    ITEM_DESIGN_INST,                           // attribute
+    -1,                                         // priority
+    NULL,                                       // icon name (for palette)
+    "Component Parameters",                     // dialog name
+    NULL,                                       // dialog data
+    ComponentNetlistFmt,
+    "",                                         // netlist data
+    ComponentAnnotFmt,
+    "",                                         // symbol name (obsolete)
+    3,                                          // artwork type (obsolete)
+    NULL,                                       // artwork data (obsolete)
+    0,                                          // extra attribute
+
+    // ====================================================================
+    // CORE PARAMETERS
+    // ====================================================================
+    create_parm(
+        "R",                                    // name
+        "Resistance",                           // label
+        PARM_DOE            |                   // attribs
+        PARM_REAL           |
+        PARM_OPTIMIZABLE    |
+        PARM_STATISTICAL,
+        "StdFormSet",                           // form set
+        RESISTANCE_UNIT,                        // unit
+        prm("StdForm","50 Ohm")),               // default value
+
+    // ====================================================================
+    // PARASITIC MODEL PARAMETERS
+    // ====================================================================
+    create_parm(
+        "C",
+        "Parallel capacitance",
+        PARM_REAL,
+        "StdFormSet",
+        CAPACITANCE_UNIT,
+        prm("StdForm","0.1 pF")),
+
+    create_parm(
+        "L",
+        "Series inductance",
+        PARM_REAL,
+        "StdFormSet",
+        INDUCTANCE_UNIT,
+        prm("StdForm","1 nH")),
+
+    // ====================================================================
+    // VERILOGA MODEL PARAMETERS
+    // ====================================================================
+    create_parm(
+        "TC1",
+        "1st order temperature coefficient",
+        PARM_REAL | PARM_NO_DISPLAY,
+        "StdFormSet",
+        UNITLESS_UNIT,
+        prm("StdForm","0.0")),
+
+    create_parm(
+        "TC2",
+        "2nd order temperature coefficient",
+        PARM_REAL | PARM_NO_DISPLAY,
+        "StdFormSet",
+        UNITLESS_UNIT,
+        prm("StdForm","0.0")),
+
+    create_parm(
+        "Kf",
+        "Flicker noise coefficient",
+        PARM_REAL | PARM_NO_DISPLAY,
+        "StdFormSet",
+        UNITLESS_UNIT,
+        prm("StdForm","0.0")),
+
+    create_parm(
+        "Af",
+        "Flicker noise exponent (usually 1.0)",
+        PARM_REAL | PARM_NO_DISPLAY,
+        "StdFormSet",
+        UNITLESS_UNIT,
+        prm("StdForm","1.0"))
+);
+
+
+// ============================================================================
+// Resitor item definition (Verilog)
+// ============================================================================
+create_item(
+    "mr_pas_r_va",                              // name
+    "Resistor (Custom Symbol)",                 // label
+    "R",                                        // prefix
+    0,                                          // attribute
+    -1,                                         // priority
+    NULL,                                       // icon name (for palette)
+    "Component Parameters",                     // dialog name
+    NULL,                                       // dialog data
+    ComponentNetlistFmt,
+    "mr_pas_r_va",                              // netlist data -> model name 
+    ComponentAnnotFmt,
+    "",                                         // symbol name (obsolete)
+    0,                                          // artwork type (obsolete)
+    NULL,                                       // artwork data (obsolete)
+    0,
+
+    // ====================================================================
+    // CORE PARAMETERS
+    // ====================================================================
+    create_parm(
+        "R",                                    // name
+        "Resistance",                           // label
+        PARM_DOE            |                   // attribs
+        PARM_REAL           |
+        PARM_OPTIMIZABLE    |
+        PARM_STATISTICAL,
+        "StdFormSet",                           // form set
+        RESISTANCE_UNIT,                        // unit
+        prm("StdForm","50 Ohm")),              // default value
+
+    // ====================================================================
+    // VERILOGA MODEL PARAMETERS
+    // ====================================================================
+    create_parm(
+        "TC1",
+        "1st order temperature coefficient",
+        PARM_REAL | PARM_NO_DISPLAY,
+        "StdFormSet",
+        UNITLESS_UNIT,
+        prm("StdForm","0.0")),
+
+    create_parm(
+        "TC2",
+        "2nd order temperature coefficient",
+        PARM_REAL | PARM_NO_DISPLAY,
+        "StdFormSet",
+        UNITLESS_UNIT,
+        prm("StdForm","0.0")),
+
+    create_parm(
+        "Kf",
+        "Flicker noise coefficient",
+        PARM_REAL | PARM_NO_DISPLAY,
+        "StdFormSet",
+        UNITLESS_UNIT,
+        prm("StdForm","0.0")),
+
+    create_parm(
+        "Af",
+        "Flicker noise exponent (usually 1.0)",
+        PARM_REAL | PARM_NO_DISPLAY,
+        "StdFormSet",
+        UNITLESS_UNIT,
+        prm("StdForm","1.0"))
+);
+
diff --git a/mrModels/mr_pas_r/schematic/master.tag b/mrModels/mr_pas_r/schematic/master.tag
new file mode 100644
index 0000000..26be1be
--- /dev/null
+++ b/mrModels/mr_pas_r/schematic/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+sch.oa
diff --git a/mrModels/mr_pas_r/schematic/sch.oa b/mrModels/mr_pas_r/schematic/sch.oa
new file mode 100644
index 0000000000000000000000000000000000000000..1a63d5db19776a89d517958812cdc3ddf5a9eb39
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diff --git a/mrModels/mr_pas_r/schematic_parasitic/master.tag b/mrModels/mr_pas_r/schematic_parasitic/master.tag
new file mode 100644
index 0000000..26be1be
--- /dev/null
+++ b/mrModels/mr_pas_r/schematic_parasitic/master.tag
@@ -0,0 +1,2 @@
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diff --git a/mrModels/mr_pas_r/schematic_parasitic/sch.oa b/mrModels/mr_pas_r/schematic_parasitic/sch.oa
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diff --git a/mrModels/mr_pas_r/schematic_veriloga/master.tag b/mrModels/mr_pas_r/schematic_veriloga/master.tag
new file mode 100644
index 0000000..26be1be
--- /dev/null
+++ b/mrModels/mr_pas_r/schematic_veriloga/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
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diff --git a/mrModels/mr_pas_r/schematic_veriloga/sch.oa b/mrModels/mr_pas_r/schematic_veriloga/sch.oa
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diff --git a/mrModels/mr_pas_r/symbol/master.tag b/mrModels/mr_pas_r/symbol/master.tag
new file mode 100644
index 0000000..e1024da
--- /dev/null
+++ b/mrModels/mr_pas_r/symbol/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+symbol.oa
diff --git a/mrModels/mr_pas_r/symbol/symbol.oa b/mrModels/mr_pas_r/symbol/symbol.oa
new file mode 100644
index 0000000000000000000000000000000000000000..c17c0c70ff0e3676e2226433002953bc28e5c617
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diff --git a/mrModels/mr_pas_r_va/symbol/master.tag b/mrModels/mr_pas_r_va/symbol/master.tag
new file mode 100644
index 0000000..e1024da
--- /dev/null
+++ b/mrModels/mr_pas_r_va/symbol/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+symbol.oa
diff --git a/mrModels/mr_pas_r_va/symbol/symbol.oa b/mrModels/mr_pas_r_va/symbol/symbol.oa
new file mode 100644
index 0000000000000000000000000000000000000000..81e4dac45548f81ba01bbf53fb5fc26012564699
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diff --git a/mrModels/mr_pas_r_va/veriloga/master.tag b/mrModels/mr_pas_r_va/veriloga/master.tag
new file mode 100644
index 0000000..22b17e0
--- /dev/null
+++ b/mrModels/mr_pas_r_va/veriloga/master.tag
@@ -0,0 +1,2 @@
+-- Master.tag File, Rev:1.0
+veriloga.va
diff --git a/mrModels/mr_pas_r_va/veriloga/veriloga.va b/mrModels/mr_pas_r_va/veriloga/veriloga.va
new file mode 100644
index 0000000..cdb6367
--- /dev/null
+++ b/mrModels/mr_pas_r_va/veriloga/veriloga.va
@@ -0,0 +1,43 @@
+// VerilogA for mrModels, mr_pas_r_va, veriloga
+
+`include "constants.vams"
+`include "disciplines.vams"
+
+module mr_pas_r_va(P1, P2);
+    inout P1, P2;
+    electrical P1, P2;
+
+    // =================================== Parameters ===================================
+    parameter real R = 1000.0 from (0:inf); // Resistance in Ohms
+    parameter real TC1 = 0.0;               // Linear temperature coefficient (1/°C)
+    parameter real TC2 = 0.0;               // Quadratic temperature coefficient (1/°C²)
+
+    // ======== Flicker (1/f) noise parameters (optional - set Kf=0 to disable) =========
+    parameter real Kf = 0.0;                // Flicker noise coefficient (1e-11 to 1e-9)
+    parameter real Af = 1.0;                // Flicker noise exponent (usually 1.0)    
+
+    real R_eff;                             // Effective resistance after temp coeff
+    real T;                                 // Temperature in Kelvin
+
+    analog begin
+        T = $temperature;                   // Get simulation temperature (Kelvin)
+
+        // Effective resistance with temperature dependence
+        R_eff = R * (1 + TC1*(T - 300.15) + TC2*(T - 300.15)*(T - 300.15));
+
+        // Ohm's law
+        V(P1, P2) <+ R_eff * I(P1, P2);
+
+        // ============================ Thermal (white) noise ===========================
+        // Correct formula: voltage noise power = 4 * k * T * R
+        V(P1, P2) <+ white_noise(4 * `P_K * T * R_eff, "thermal");
+
+        // ======================== Optional flicker (1/f) noise ========================
+        // Excess noise that appears in some real resistors (carbon, thick film, etc.)
+        if (Kf > 0) begin
+            // Current noise contribution (common way to model resistor excess noise)
+            V(P1, P2) <+ flicker_noise(Kf * pow(abs(I(P1,P2)), Af), 1.0, "excess");
+        end
+    end
+    
+endmodule