47 lines
1.8 KiB
Plaintext
47 lines
1.8 KiB
Plaintext
// ----------------------------------------------------------------------------
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// (setq tab-width 4)
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// Place custom AEL code here.
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// For example, any custom AEL shared by all components in this library.
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// ----------------------------------------------------------------------------
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decl MRMODELS_NAME = designKitRecord[0];
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decl MRMODELS_PATH = designKitRecord[1];
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decl MRMODELS_BOOT = designKitRecord[2];
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decl MRMODELS_VER = designKitRecord[3];
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decl MRMODELS_DIR_CELLS = strcat(MRMODELS_PATH, MRMODELS_NAME, "/" );
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decl MRMODELS_DIR_CIRCUIT_AEL = strcat(MRMODELS_PATH, "circuit/ael/" );
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decl MRMODELS_DIR_CIRCUIT_BITMAP = strcat(MRMODELS_PATH, "circuit/bitmaps/" );
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decl MRMODELS_DIR_CIRCUIT_ARTWORK = strcat(MRMODELS_PATH, "circuit/artwork/" );
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decl MRMODELS_DIR_CIRCUIT_MODELS = strcat(MRMODELS_PATH, "circuit/models/" );
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decl MRMODELS_DIR_DE_AEL = strcat(MRMODELS_PATH, "de/ael/" );
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decl MRMODELS_DIR_DRC_RULES = strcat(MRMODELS_PATH, "drc/rules/" );
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decl MRMODELS_DIR_VERILOGA = strcat(MRMODELS_PATH, "veriloga/" );
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decl logFile = fopen("C:/temp/my_ads_log.txt", "a"); // "a" = append mode
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if (logFile != NULL)
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{
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fprintf(logFile, "Loading %s design kit\n", MRMODELS_NAME);
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fprintf(logFile, "Path : %s\n", MRMODELS_PATH);
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fprintf(logFile, "Boot : %s\n", MRMODELS_BOOT);
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fprintf(logFile, "Models: %s\n", MRMODELS_DIR_CELLS);
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fclose( logFile);
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}
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else
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{
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de_error("Failed to open log file!");
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}
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// ----------------------------------------------------------------------------
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// Load
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// ----------------------------------------------------------------------------
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load( strcat( MRMODELS_DIR_CIRCUIT_AEL, "mrmodels_include"));
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load( strcat( MRMODELS_DIR_CIRCUIT_AEL, "mr/mr_resistor" ));
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