Initial check in

2026-01-03 19:05:48 +01:00
commit 1254878a31
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+// ============================================================================
+// FX2LP SFR Registers at 0xE0 - 0xEF
+// ----------------------------------------------------------------------------
+// 0xE0 - ACC
+// 0xE1 -
+// 0xE2 -
+// 0xE3 -
+// 0xE4 -
+// 0xE5 -
+// 0xE6 -
+// 0xE7 -
+// 0xE8 - EIE
+// 0xE9 -
+// 0xEA -
+// 0xEB -
+// 0xEC -
+// 0xED -
+// 0xEE -
+// 0xEF -
+// ============================================================================
+#ifndef FX2REGS_SFREX_H
+#define FX2REGS_SFREX_H
+
+sfr ACC	= 0xE0;
+sfr	EIE	= 0xE8;
+
+// ------------------------------------
+// EIE bits
+// ------------------------------------
+sbit EUSB	= 0xE8	+0;
+sbit EI2C	= 0xE8	+1;
+sbit EIEX4	= 0xE8	+2;
+sbit EIEX5	= 0xE8	+3;
+sbit EIEX6	= 0xE8	+4;
+
+#endif
+