Initial check in
This commit is contained in:
@@ -0,0 +1,191 @@
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#ifndef TRI_H
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#define TRI_H
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// trinity specific (must be moved somewhere else)
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#define bmCap0_I2C 0x01 // has I2C bus
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#define bmCap0_SER 0x02 // has serial ports (2)
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#define bmCap0_EPR 0x04 // has flash EEPROM
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#define bmCap0_RAM 0x08 // has 32k SRAM
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#define bmCap0_JTG 0x10 // has standard JTAG
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#define bmCap1_LED 0x01
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#define bmCap1_LCD 0x02
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#define bmCap1_EXP 0x04
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#define bmCap1_LXP 0x08
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#define bmCap1_SDR 0x10
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// ================================================================================================
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// LCD stuff
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// ================================================================================================
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#ifdef LCD_7565
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#include <lcd\lcd_7565r.h>
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#endif
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#ifdef LCD_44780
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#include <lcd\lcd_44780.h>
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#endif
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// ================================================================================================
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// USB interrupt hooks
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// ================================================================================================
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extern void (*sudav) (void);
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extern void (*ep0ack) (void); // sudav used instead
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extern void (*ep0out) (void); // sudav used instead
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extern void (*ep0in ) (void); // sudav used instead
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extern void (*ep1out) (void);
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extern void (*ep1in ) (void);
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extern void (*ep2inout) (void); // JTAG host->device
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extern void (*ep4inout) (void); // JTAG device->host
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extern void (*ep6inout) (void); // for slave fifo or gpif highspeed transfer
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extern void (*ep8inout) (void); // for slave fifo or gpif highspeed transfer
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extern bool (*DR_VendorCommand)();
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// ================================================================================================
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// global variables
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// ================================================================================================
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extern xdata BYTE devSerialNumber [8];
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extern xdata BYTE devCapabilities [8];
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extern xdata BYTE devIdentifier [8];
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extern BYTE xdata sig[2];
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extern BYTE xdata crc[2];
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extern xdata DEVICE_DSCR xdata *pDscrDevice;
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extern xdata DEVICEQUAL_DSCR xdata *pDscrDeviceQual;
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extern xdata CONFIG_DSCR xdata *pDscrMainConfig;
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extern xdata CONFIG_DSCR xdata *pDscrOthrConfig;
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extern xdata CONFIG_DSCR xdata *pDscrFsConfig;
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extern xdata CONFIG_DSCR xdata *pDscrHsConfig;
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extern data STRING_DSCR xdata *pDscrString;
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// ============================================================================
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// ============================================================================
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// ============================================================================
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//
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// IMPORTANT !!!!
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//
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// Keep this include file synchronized with jtag_state.s51 and Delphi
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// sources !!!
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//
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// ============================================================================
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// ============================================================================
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// ============================================================================
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// ============================================================================
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// JTAG states (Lattice VME values)
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// ============================================================================
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#define TS_RESET 0
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#define TS_IDLE 1
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#define TS_IRPAUSE 2
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#define TS_DRPAUSE 3
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#define TS_IRSHIFT 4
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#define TS_DRSHIFT 5
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#define TS_DRCAPT 6
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#define TS_IREXIT1 7
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#define TS_DREXIT1 8
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// ============================================================================
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//
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// ENDPOINT 0 request codes
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//
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// reserved by cypress:
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// 0x00 - 0x0C
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// 0xA0 - 0xAF
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//
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// ============================================================================
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// ----------------------------------------------------------------------------
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// JTAG commands 0xC0 - 0xCF
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// ----------------------------------------------------------------------------
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// interface commands
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// -------------------------------
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#define CMD_JTAG_INIT 0xC0 // initialize JTAG interface
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#define CMD_JTAG_RESET 0xC1 // reset JTAG interface
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#define CMD_JTAG_ENABLE 0xC2 // enable physical I/O
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#define CMD_JTAG_STATUS 0xC3 // get JTAG status
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// SVF,VME,... commands
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// -------------------------------
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#define CMD_JTAG_ENDIR 0xC8 //
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#define CMD_JTAG_ENDDR 0xC9 //
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#define CMD_JTAG_STATE 0xCA //
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#define CMD_JTAG_TRST 0xCB //
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// -------------------------------
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#define CMD_JTAG_TEST 0xCF //
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// ----------------------------------------------------------------------------
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// Trinity configuration commands 0xE0 - 0xE7
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// ----------------------------------------------------------------------------
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#define CMD_TRI_CAPS 0xE0 // get/set trinity board capabilities
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#define CMD_TRI_SERIAL 0xE1 // get/set trinity board serial
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#define CMD_TRI_IDENTIFIER 0xE2 // get/set trinity board identifier
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// ----------------------------------------------------------------------------
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// Trinity base peripheral commands 0xD0 - 0xDF
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// ----------------------------------------------------------------------------
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#define CMD_TRI_IIC 0xD0 // IIC read/write
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#define CMD_TRI_SER 0xD8 // serial read/write
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// ----------------------------------------------------------------------------
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// LCD/LED commands
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// ----------------------------------------------------------------------------
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#define CMD_LCD_LED 0x40 //
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#define CMD_LCD_CLS 0x50 //
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#define CMD_LCD_GOTOXY 0x51 //
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#define CMD_LCD_PUTC 0x52 //
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#define CMD_LCD_PUTS 0x53 //
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// =============================================================================
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//
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// ENDPOINT 1 request codes
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//
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//
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// =============================================================================
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#define CMD_IIC_WRITE 0x00 // IIC write
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#define CMD_IIC_READ 0x00 // IIC read
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#define CMD_IIC_READ_RSW 0x01 // IIC read w/ repeated start cond. 16
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#define CMD_IIC_READ_RSB 0x02 // IIC read w/ repeated start cond. 8
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#define CMD_IIC_WAIT 0x1F // wait for a device
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// (e.g: wait for eeprom write finish)
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#define CMD_EEP_WRITE 0x20 // EEPROM write
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#define CMD_EEP_READ 0x20 // EEPROM read
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// =============================================================================
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//
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// ENDPOINT 2 request codes
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//
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// =============================================================================
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// -----------------------------------------------------------------------------
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// JTAG commands 0xC0 - 0xCF
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//
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// These commands may transfer huge amount of data or take long time to run,
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// so they are implemented as EP2 commands.
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// ----------------------------------------------------------------------------
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// interface commands
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// -------------------------------
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#define CMD_JTAG_SCAN 0xC0 // scan JTAG chain
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// SVF,VME,... commands
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// -------------------------------
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#define CMD_JTAG_SIR 0xC1 // write/read
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#define CMD_JTAG_SDR 0xC2 // write/read
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#define CMD_JTAG_RUN 0xC3 //
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#define CMD_JTAG_SDW 0xC4 // write only
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#endif
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@@ -0,0 +1,9 @@
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#include <fx2.h>
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#include <tri.h>
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extern bool tri_command(void);
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void tri_boot(void)
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{
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DR_VendorCommand = tri_command;
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}
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@@ -0,0 +1,113 @@
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#include <fx2.h>
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#include <fx2_regs.h>
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#include <fx2_i2c.h>
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#include <tri.h>
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extern xdata BYTE devSerialNumber [];
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extern xdata BYTE devCapabilities [];
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extern xdata BYTE devIdentifier [];
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xdata i2c_buffer[64];
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// ================================================================================================
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// tri_command
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//
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// Common trinity commands implementation. The functions are:
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//
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// - read serial number
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// - read capabilities
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// - read identifier
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// - iic read
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// - eeprom read (todo)
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//
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// - write identifier
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// - iic write
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// - eeprom write (todo)
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//
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// ================================================================================================
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bool tri_command()
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{
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bool result = true;
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bit dir = (SETUPDAT[0] & 0x80) ? 1 : 0;
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BYTE cmd = SETUPDAT[1]; // (SETUPDAT[1] & 0x7F);
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PSUDAV sud = (PSUDAV)SETUPDAT;
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// ----------------------------------------------------
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// IN command device -> host
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// ----------------------------------------------------
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if(dir)
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{
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switch(sud->Request)
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{
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// --------------------------------------------
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// Get Serial Number
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// --------------------------------------------
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case CMD_TRI_SERIAL:
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SUDPTRH = MSB(devSerialNumber);
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SUDPTRL = LSB(devSerialNumber);
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break;
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// --------------------------------------------
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// Get Capabilities
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// --------------------------------------------
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case CMD_TRI_CAPS:
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SUDPTRH = MSB(devCapabilities);
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SUDPTRL = LSB(devCapabilities);
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break;
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// --------------------------------------------
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// Get Identifier
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// --------------------------------------------
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case CMD_TRI_IDENTIFIER:
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SUDPTRH = MSB(devIdentifier);
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SUDPTRL = LSB(devIdentifier);
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break;
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// --------------------------------------------
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// I2C read
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// --------------------------------------------
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case CMD_TRI_IIC:
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break;
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// --------------------------------------------
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// default (invalid command)
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// --------------------------------------------
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default:
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// result = false;
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break;
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}
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}
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// ----------------------------------------------------
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// OUT command host -> device
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// ----------------------------------------------------
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else
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{
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switch(cmd)
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{
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// --------------------------------------------
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// Set Identifier
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// --------------------------------------------
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case CMD_TRI_IDENTIFIER:
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break;
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// --------------------------------------------
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// default (invalid command)
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// --------------------------------------------
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default:
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// result = false;
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break;
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}
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}
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return result;
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}
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@@ -0,0 +1,349 @@
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#include <fx2.h>
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#include <fx2_regs.h>
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#include <fx2_i2c.h>
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#include <fx2_eeprom.h>
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#include <fx2_usart.h>
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#include <fx2_syncdelay.h>
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#include <tri.h>
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STRING_DSCR xdata * GetStringDscr( BYTE index);
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extern void tri_sudav( void);
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extern void tri_ep1out( void);
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// ================================================================================================
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// tri_conf
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// ================================================================================================
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void tri_conf()
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{
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int i;
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#ifdef LCD_7565
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// ------------------------------------------------------------------------
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// For LCD (7565r), the following pins are used for LCD interface:
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//
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// RST - PD.6
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// CS - PD.5
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// A0 - PD.4
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// SCL - PD.3
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// SI - PD.1
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// ------------------------------------------------------------------------
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IOD = 0x00;
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OED = 0xFF;
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#endif
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#ifdef LCD_44780
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// ------------------------------------------------------------------------
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// LED and LCD display
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//
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// bit dir init function
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// ------------------------------------------
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// PD.0 - - (FPGA)
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//
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// PD.1 out 0 LCD R/W
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// PD.2 out 0 LCD R/S
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// PD.3 out 0 LCD E
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//
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// PD.4 out 0 LED 0
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// PD.5 out 0 LED 1
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// PD.6 out 0 LED 2
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// PD.7 out 0 LED 3
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//
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// PE.0 out 0 LCD D0
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// PE.1 out 0 LCD D1
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// PE.2 out 0 LCD D2
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// PE.3 out 0 LCD D3
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// PE.4 out 0 LCD D4
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// PE.5 out 0 LCD D5
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||||
// PE.6 out 0 LCD D6
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||||
// PE.7 out 0 LCD D7
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||||
//
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||||
// ------------------------------------------------------------------------
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IOD = 0x00; // PD[1,2,3] lcd 44780 ctrl PD[4,5,6,7] leds
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IOE = 0x00; // lcd 44780 data
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||||
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||||
OEE = 0xFF; //
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||||
OED = 0xFE; //
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||||
#endif
|
||||
|
||||
#ifdef DEBUG
|
||||
lcd_init();
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||||
lcd_cls();
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||||
lcd_gotoxy(1,1);
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||||
lcd_putc('X');
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||||
lcd_gotoxy(0,0);
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||||
#endif
|
||||
|
||||
// ========================================================================
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||||
//
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||||
// USB Descriptor Tables
|
||||
//
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||||
// ========================================================================
|
||||
pDscrString = (STRING_DSCR xdata *)&DscrString;
|
||||
pDscrDevice = (DEVICE_DSCR xdata *)&DscrDevice;
|
||||
pDscrDeviceQual = (DEVICEQUAL_DSCR xdata *)&DscrDeviceQual;
|
||||
|
||||
pDscrHsConfig = (CONFIG_DSCR xdata *)&DscrHsConfig;
|
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pDscrFsConfig = (CONFIG_DSCR xdata *)&DscrFsConfig;
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||||
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||||
pDscrMainConfig = pDscrHsConfig;
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||||
pDscrOthrConfig = pDscrFsConfig;
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||||
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||||
pDscrMainConfig->type = DSCR_CONFIG;
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pDscrOthrConfig->type = DSCR_OTHERSPEED;
|
||||
|
||||
// ========================================================================
|
||||
//
|
||||
// EP1
|
||||
//
|
||||
// ========================================================================
|
||||
EP1OUTCFG = 0xB0; SYNCDELAY; // valid, out, bulk, 64, 1x
|
||||
EP1INCFG = 0xB0; SYNCDELAY; // valid, in, bulk, 64, 1x
|
||||
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||||
// ------------------------------------------------------------------------
|
||||
// EP1 usb interrupt handlers
|
||||
// ------------------------------------------------------------------------
|
||||
ep1out = tri_ep1out;
|
||||
ep1in = 0; // not needed
|
||||
|
||||
// --------------------------------------------------------------
|
||||
// Out endpoints do not come up armed.
|
||||
// Arm the EP1OUT endpoint by writing the byte count.
|
||||
// --------------------------------------------------------------
|
||||
EP1OUTBC = 0x40; SYNCDELAY; // arm EP1 output endpoint
|
||||
|
||||
// --------------------------------------------------------------
|
||||
// Enable EP1 interrupts
|
||||
// --------------------------------------------------------------
|
||||
EPIE |= (bmEP1IN | bmEP1OUT);
|
||||
|
||||
// ========================================================================
|
||||
// Enable INT2 and INT4 autovectoring
|
||||
// ------------------------------------------------------------------------
|
||||
INTSETUP |= (bmAV2EN | bmAV4EN);
|
||||
|
||||
// ------------------------------------------------------------------------
|
||||
// EP0 USB interrupt handlers
|
||||
// ------------------------------------------------------------------------
|
||||
sudav = tri_sudav;
|
||||
|
||||
// ------------------------------------------------------------------------
|
||||
// Enable interrupts
|
||||
// ------------------------------------------------------------------------
|
||||
USB_IRQ_ENABLE(); // Enable USB interrupts
|
||||
RSM_IRQ_ENABLE(); // Enable Wake-up/resume interrupt
|
||||
|
||||
// ------------------------------------------------------------------------
|
||||
// Enable USB interrupts
|
||||
// ------------------------------------------------------------------------
|
||||
USBIE |= bmSUDAV |
|
||||
bmSUTOK |
|
||||
bmSUSP |
|
||||
bmURES |
|
||||
bmHSGRANT;
|
||||
|
||||
// ========================================================================
|
||||
//
|
||||
// I2C
|
||||
//
|
||||
// ========================================================================
|
||||
fx2_i2c_init();
|
||||
|
||||
// ========================================================================
|
||||
//
|
||||
// Read configuration data from eeprom
|
||||
//
|
||||
// ========================================================================
|
||||
EA = 1;
|
||||
|
||||
// FX2_EEPROM_Read( 511, 0, 2, sig );
|
||||
// FX2_EEPROM_Read( 511, 2, 8, devSerialNumber );
|
||||
// FX2_EEPROM_Read( 511, 10, 8, devCapabilities );
|
||||
// FX2_EEPROM_Read( 511, 18, 8, devIdentifier );
|
||||
// FX2_EEPROM_Read( 511, 30, 2, crc );
|
||||
|
||||
// ------------------------------------------------------------------------
|
||||
// check data
|
||||
// ------------------------------------------------------------------------
|
||||
|
||||
|
||||
// ------------------------------------------------------------------------
|
||||
// if data is corrupt, clear the configuration variables.
|
||||
// ------------------------------------------------------------------------
|
||||
for( i=0; i<8; i++)
|
||||
{
|
||||
devCapabilities [i] = 0;
|
||||
devSerialNumber [i] = 0;
|
||||
devIdentifier [i] = 0;
|
||||
}
|
||||
|
||||
devSerialNumber[0] = 'T';
|
||||
devSerialNumber[1] = '1';
|
||||
|
||||
devCapabilities[0] |= bmCap0_I2C;
|
||||
devCapabilities[0] |= bmCap0_EPR;
|
||||
|
||||
/*
|
||||
buf[0] = 0x33;
|
||||
buf[1] = 0x75;
|
||||
buf[2] = 0xEF;
|
||||
buf[3] = 0xAA;
|
||||
buf[4] = 0x30;
|
||||
buf[5] = 0x31;
|
||||
buf[6] = 0x32;
|
||||
buf[7] = 0x33;
|
||||
|
||||
dly[0] = 1;
|
||||
dly[1] = 0;
|
||||
dly[2] = 0;
|
||||
dly[3] = 0;
|
||||
dly[4] = 1;
|
||||
dly[5] = 0;
|
||||
dly[6] = 4;
|
||||
dly[7] = 0;
|
||||
|
||||
|
||||
|
||||
fx2_usart_init( 9600, uc8e1);
|
||||
fx2_usart_send( 4, buf, dly);
|
||||
|
||||
fx2_usart_send( 4, &buf[4], &dly[4]);
|
||||
// SBUF0 = 0xaa;
|
||||
// SBUF1 = 0x31;
|
||||
|
||||
// fx2_i2c_read( 0x55, 3, buf);
|
||||
// fx2_i2c_write( 0x55, 5, buf);
|
||||
*/
|
||||
}
|
||||
|
||||
// ================================================================================================
|
||||
// ================================================================================================
|
||||
// ================================================================================================
|
||||
//
|
||||
// LCD 7565r support
|
||||
//
|
||||
// ================================================================================================
|
||||
// ================================================================================================
|
||||
// ================================================================================================
|
||||
#ifdef LCD_7565
|
||||
|
||||
#define PIN_RST PD6
|
||||
#define PIN_CS PD5
|
||||
#define PIN_A0 PD4
|
||||
#define PIN_SCL PD3
|
||||
#define PIN_SI PD1
|
||||
|
||||
// ------------------------------------------------------------------------------------------------
|
||||
// lcd init
|
||||
// ------------------------------------------------------------------------------------------------
|
||||
void lcd_7565r_init(void)
|
||||
{
|
||||
PIN_CS = 1; // unselect the chip
|
||||
PIN_RST = 0; // RST
|
||||
FX2_Delay(10); // delay 10 ms
|
||||
|
||||
PIN_RST = 1; // release RST line
|
||||
FX2_Delay(1); // delay 1 ms
|
||||
PIN_CS = 0; // select the chip
|
||||
}
|
||||
|
||||
// ------------------------------------------------------------------------------------------------
|
||||
// lcd deactivate
|
||||
// ------------------------------------------------------------------------------------------------
|
||||
void lcd_7565r_deactivate(void)
|
||||
{
|
||||
PIN_RST = 1; // make sure reset line is released
|
||||
PIN_CS = 0; // unselect display
|
||||
|
||||
PIN_A0 = 0; //
|
||||
PIN_SI = 0; //
|
||||
PIN_SCL = 0; //
|
||||
}
|
||||
|
||||
// ------------------------------------------------------------------------------------------------
|
||||
// lcd send
|
||||
// ------------------------------------------------------------------------------------------------
|
||||
void lcd_7565r_send( BYTE d, bit a0)
|
||||
{
|
||||
BYTE i;
|
||||
|
||||
PIN_A0 = 0;
|
||||
|
||||
for( i=0; i<8; i++)
|
||||
{
|
||||
PIN_SI = (d & (1 << (7-i))) ? 1 : 0;
|
||||
PIN_A0 = (i == 7) ? a0 : 0;
|
||||
PIN_SCL = 1;
|
||||
PIN_SCL = 0;
|
||||
}
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
// ================================================================================================
|
||||
// ================================================================================================
|
||||
// ================================================================================================
|
||||
//
|
||||
// LCD 44780 support
|
||||
//
|
||||
// ================================================================================================
|
||||
// ================================================================================================
|
||||
// ================================================================================================
|
||||
#ifdef LCD_44780
|
||||
|
||||
#define LED_3 PD7
|
||||
#define LED_2 PD6
|
||||
#define LED_1 PD5
|
||||
#define LED_0 PD4
|
||||
|
||||
#define LCD_E PD3
|
||||
#define LCD_RS PD2
|
||||
#define LCD_RW PD1
|
||||
|
||||
#define LCD_DATA IOE
|
||||
|
||||
// ------------------------------------------------------------------------------------------------
|
||||
// lcd_4478_write_led
|
||||
// ------------------------------------------------------------------------------------------------
|
||||
void lcd_44780_write_led( BYTE n, BYTE v)
|
||||
{
|
||||
switch(n)
|
||||
{
|
||||
case 0: LED_0 = (v) ? 1 : 0; break;
|
||||
case 1: LED_1 = (v) ? 1 : 0; break;
|
||||
case 2: LED_2 = (v) ? 1 : 0; break;
|
||||
case 3: LED_3 = (v) ? 1 : 0; break;
|
||||
}
|
||||
}
|
||||
|
||||
// ------------------------------------------------------------------------------------------------
|
||||
// lcd_44780_write_ctrl
|
||||
// ------------------------------------------------------------------------------------------------
|
||||
void lcd_44780_write_ctrl( unsigned char value)
|
||||
{
|
||||
LCD_E = 1;
|
||||
LCD_DATA = value;
|
||||
LCD_E = 0;
|
||||
|
||||
LCD_RW = 0;
|
||||
LCD_RS = 0;
|
||||
}
|
||||
|
||||
// ------------------------------------------------------------------------------------------------
|
||||
// lcd_44780_write_data
|
||||
// ------------------------------------------------------------------------------------------------
|
||||
void lcd_44780_write_data( unsigned char value)
|
||||
{
|
||||
LCD_RW = 0;
|
||||
LCD_RS = 1;
|
||||
|
||||
LCD_E = 1;
|
||||
LCD_DATA = value;
|
||||
LCD_E = 0;
|
||||
|
||||
LCD_RW = 0;
|
||||
LCD_RS = 0;
|
||||
}
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,309 @@
|
||||
;; ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||
;; ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||
;;
|
||||
;; File : fx2_dscr.asm
|
||||
;; Contents : This file contains descriptor data tables.
|
||||
;;
|
||||
;; ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||
;; ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||
|
||||
DSCR_DEVICE equ 1 ;; Descriptor type: Device
|
||||
DSCR_CONFIG equ 2 ;; Descriptor type: Configuration
|
||||
DSCR_STRING equ 3 ;; Descriptor type: String
|
||||
DSCR_INTRFC equ 4 ;; Descriptor type: Interface
|
||||
DSCR_ENDPNT equ 5 ;; Descriptor type: Endpoint
|
||||
DSCR_DEVQUAL equ 6 ;; Descriptor type: Device Qualifier
|
||||
|
||||
ET_CONTROL equ 0 ;; Endpoint type: Control
|
||||
ET_ISO equ 1 ;; Endpoint type: Isochronous
|
||||
ET_BULK equ 2 ;; Endpoint type: Bulk
|
||||
ET_INT equ 3 ;; Endpoint type: Interrupt
|
||||
|
||||
DSCR_DEVICE_LEN equ 18
|
||||
DSCR_CONFIG_LEN equ 9
|
||||
DSCR_INTRFC_LEN equ 9
|
||||
DSCR_ENDPNT_LEN equ 7
|
||||
DSCR_DEVQUAL_LEN equ 10
|
||||
|
||||
DIR_OUT equ 0
|
||||
DIR_IN equ 080H
|
||||
|
||||
|
||||
PUBLIC DscrDevice
|
||||
PUBLIC DscrDeviceQual
|
||||
PUBLIC DscrHsConfig
|
||||
PUBLIC DscrFsConfig
|
||||
PUBLIC DscrString
|
||||
|
||||
DSCR SEGMENT CODE PAGE
|
||||
rseg DSCR
|
||||
|
||||
;; ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||
;; ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||
;; ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||
;;
|
||||
;; Device Descriptor
|
||||
;;
|
||||
;; ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||
;; ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||
;; ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||
|
||||
DscrDevice:
|
||||
db DSCR_DEVICE_LEN ;; Descriptor length
|
||||
db DSCR_DEVICE ;; Decriptor type
|
||||
db 00 ;; Specification Version (BCD) (L)
|
||||
db 02 ;; Specification Version (BCD) (H)
|
||||
db 0FFH ;; Device class
|
||||
db 0FFH ;; Device sub-class
|
||||
db 0FFH ;; Device sub-sub-class
|
||||
db 64 ;; Maximum packet size for EP0
|
||||
|
||||
db 0D0h ;; Vendor ID (L)
|
||||
db 016h ;; Vendor ID (H)
|
||||
db 012h ;; Product ID (L)
|
||||
db 007h ;; Product ID (H)
|
||||
|
||||
db 00h ;; Product version ID (L)
|
||||
db 00h ;; Product version ID (H)
|
||||
db 1 ;; Manufacturer string index
|
||||
db 2 ;; Product string index
|
||||
db 0 ;; Serial number string index
|
||||
db 1 ;; Number of configurations
|
||||
|
||||
DscrDeviceQual:
|
||||
db DSCR_DEVQUAL_LEN ;; Descriptor length
|
||||
db DSCR_DEVQUAL ;; Decriptor type
|
||||
dw 0002H ;; Specification Version (BCD)
|
||||
db 0FFH ;; Device class
|
||||
db 0FFH ;; Device sub-class
|
||||
db 0FFH ;; Device sub-sub-class
|
||||
db 64 ;; Maximum packet size for other speed
|
||||
db 1 ;; Number of configurations
|
||||
db 0 ;; Reserved
|
||||
|
||||
|
||||
;; ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||
;; ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||
;; ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||
;;
|
||||
;; Full Speed Configuration (DEFAULT)
|
||||
;;
|
||||
;; ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||
;; ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||
;; ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||
DSCR_FS SEGMENT CODE PAGE
|
||||
rseg DSCR_FS
|
||||
|
||||
DscrFsConfig:
|
||||
;; ====================================================================
|
||||
;; Configuration Descriptor
|
||||
;; ====================================================================
|
||||
db DSCR_CONFIG_LEN ;; Descriptor length
|
||||
db DSCR_CONFIG ;; Descriptor type
|
||||
|
||||
db (DscrFsConfigEnd-DscrFsConfig) mod 256 ;; Total Length (LSB)
|
||||
db (DscrFsConfigEnd-DscrFsConfig) / 256 ;; Total Length (MSB)
|
||||
|
||||
db 1 ;; Number of interfaces
|
||||
db 9 ;; Configuration number
|
||||
db 0 ;; Configuration string
|
||||
db 01000000b ;; Attributes (b7 - buspwr, b6 - selfpwr, b5 - rwu)
|
||||
db 50 ;; Power requirement (div 2 ma)
|
||||
|
||||
;; ====================================================================
|
||||
;; Interface 0, Alternate Setting 0
|
||||
;; ====================================================================
|
||||
db DSCR_INTRFC_LEN ;; Descriptor length
|
||||
db DSCR_INTRFC ;; Descriptor type
|
||||
db 0 ;; Zero-based index of this interface
|
||||
db 0 ;; Alternate setting
|
||||
db 2 ;; Number of end points
|
||||
db 0ffH ;; Interface class
|
||||
db 0ffH ;; Interface sub class
|
||||
db 0ffH ;; Interface sub sub class
|
||||
db 0 ;; Interface descriptor string index
|
||||
|
||||
;; --------------------------------------------------------------------
|
||||
;; Endpoint Descriptor 01 (64 bytes bulk mode)
|
||||
;; --------------------------------------------------------------------
|
||||
db DSCR_ENDPNT_LEN ;; Descriptor length
|
||||
db DSCR_ENDPNT ;; Descriptor type
|
||||
db 01H + DIR_OUT ;; Endpoint number, and direction
|
||||
db ET_BULK ;; Endpoint type
|
||||
db 40H ;; Maximum packet size (LSB)
|
||||
db 00H ;; Maximum packet size (MSB)
|
||||
db 00H ;; Polling interval
|
||||
|
||||
;; --------------------------------------------------------------------
|
||||
;; Endpoint Descriptor 81 (64 bytes bulk mode)
|
||||
;; --------------------------------------------------------------------
|
||||
db DSCR_ENDPNT_LEN ;; Descriptor length
|
||||
db DSCR_ENDPNT ;; Descriptor type
|
||||
db 01H + DIR_IN ;; Endpoint number, and direction
|
||||
db ET_BULK ;; Endpoint type
|
||||
db 40H ;; Maximum packet size (LSB)
|
||||
db 00H ;; Maximum packet size (MSB)
|
||||
db 00H ;; Polling interval
|
||||
DscrFsConfigEnd:
|
||||
|
||||
;; ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||
;; ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||
;; ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||
;;
|
||||
;; High Speed Configuration
|
||||
;;
|
||||
;; ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||
;; ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||
;; ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||
DSCR_HS SEGMENT CODE PAGE
|
||||
rseg DSCR_HS
|
||||
|
||||
DscrHsConfig:
|
||||
;; ====================================================================
|
||||
;; Configuration Descriptor
|
||||
;; ====================================================================
|
||||
db DSCR_CONFIG_LEN ;; Descriptor length
|
||||
db DSCR_CONFIG ;; Descriptor type
|
||||
|
||||
db (DscrHsConfigEnd-DscrHsConfig) mod 256 ;; Total Length (LSB)
|
||||
db (DscrHsConfigEnd-DscrHsConfig) / 256 ;; Total Length (MSB)
|
||||
|
||||
db 1 ;; Number of interfaces
|
||||
db 1 ;; Configuration number
|
||||
db 0 ;; Configuration string
|
||||
db 10000000b ;; Attributes (b7 - buspwr, b6 - selfpwr, b5 - rwu)
|
||||
db 45 ;; Power requirement (div 2 mA)
|
||||
|
||||
;; ====================================================================
|
||||
;; Interface Descriptor
|
||||
;; ====================================================================
|
||||
db DSCR_INTRFC_LEN ;; Descriptor length
|
||||
db DSCR_INTRFC ;; Descriptor type
|
||||
db 0 ;; Zero-based index of this interface
|
||||
db 0 ;; Alternate setting
|
||||
db 4 ;; Number of end points
|
||||
db 0ffH ;; Interface class
|
||||
db 00H ;; Interface sub class
|
||||
db 00H ;; Interface sub sub class
|
||||
db 0 ;; Interface descriptor string index
|
||||
|
||||
;; ====================================================================
|
||||
;; Endpoint Descriptor 01 (out, interrupt, 1x, 64) 01
|
||||
;; ====================================================================
|
||||
db DSCR_ENDPNT_LEN ;; Descriptor length
|
||||
db DSCR_ENDPNT ;; Descriptor type
|
||||
db 01H + DIR_OUT ;; Endpoint number, and direction
|
||||
db ET_BULK ;; Endpoint type
|
||||
db 40H ;; Maximum packet size (LSB)
|
||||
db 00H ;; Maximum packet size (MSB)
|
||||
db 00H ;; Polling interval
|
||||
|
||||
;; ====================================================================
|
||||
;; Endpoint Descriptor 01 (in, interrupt, 1x, 64) 81
|
||||
;; ====================================================================
|
||||
db DSCR_ENDPNT_LEN ;; Descriptor length
|
||||
db DSCR_ENDPNT ;; Descriptor type
|
||||
db 01H + DIR_IN ;; Endpoint number, and direction
|
||||
db ET_BULK ;; Endpoint type
|
||||
db 40H ;; Maximum packet size (LSB)
|
||||
db 00H ;; Maximum packet size (MSB)
|
||||
db 00H ;; Polling interval
|
||||
|
||||
;; ====================================================================
|
||||
;; Endpoint Descriptor 02 (out, bulk, 2x, 512) 02
|
||||
;; ====================================================================
|
||||
db DSCR_ENDPNT_LEN ;; Descriptor length
|
||||
db DSCR_ENDPNT ;; Descriptor type
|
||||
db 02H + DIR_OUT ;; Endpoint number, and direction
|
||||
db ET_BULK ;; Endpoint type
|
||||
db 00H ;; Maximum packet size (LSB)
|
||||
db 02H ;; Maximum packet size (MSB)
|
||||
db 00H ;; Polling interval
|
||||
|
||||
;; ====================================================================
|
||||
;; Endpoint Descriptor 04 (in, bulk, 2x, 512) 84
|
||||
;; ====================================================================
|
||||
db DSCR_ENDPNT_LEN ;; Descriptor length
|
||||
db DSCR_ENDPNT ;; Descriptor type
|
||||
db 04H + DIR_IN ;; Endpoint number, and direction
|
||||
db ET_BULK ;; Endpoint type
|
||||
db 00H ;; Maximum packet size (LSB)
|
||||
db 02H ;; Maximum packet size (MSB)
|
||||
db 00H ;; Polling interval
|
||||
|
||||
;; ====================================================================
|
||||
;; Endpoint Descriptor 06 (out, bulk, 2x, 512) 06
|
||||
;; ====================================================================
|
||||
db DSCR_ENDPNT_LEN ;; Descriptor length
|
||||
db DSCR_ENDPNT ;; Descriptor type
|
||||
db 06H + DIR_OUT ;; Endpoint number, and direction
|
||||
db ET_BULK ;; Endpoint type
|
||||
db 00H ;; Maximum packet size (LSB)
|
||||
db 02H ;; Maximum packet size (MSB)
|
||||
db 00H ;; Polling interval
|
||||
|
||||
;; ====================================================================
|
||||
;; Endpoint Descriptor 08 (in, bulk, 2x, 512) 88
|
||||
;; ====================================================================
|
||||
db DSCR_ENDPNT_LEN ;; Descriptor length
|
||||
db DSCR_ENDPNT ;; Descriptor type
|
||||
db 08H + DIR_IN ;; Endpoint number, and direction
|
||||
db ET_BULK ;; Endpoint type
|
||||
db 00H ;; Maximum packet size (LSB)
|
||||
db 02H ;; Maximum packet size (MSB)
|
||||
db 00H ;; Polling interval
|
||||
DscrHsConfigEnd:
|
||||
|
||||
;; ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||
;; ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||
;; ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||
;;
|
||||
;; String Descriptors
|
||||
;;
|
||||
;; ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||
;; ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||
;; ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||
DSCR_ST SEGMENT CODE PAGE
|
||||
rseg DSCR_ST
|
||||
|
||||
DscrString:
|
||||
|
||||
String0:
|
||||
db String0End-String0
|
||||
db DSCR_STRING
|
||||
db ' ',00
|
||||
String0End:
|
||||
|
||||
String1:
|
||||
db String1End-String1
|
||||
db DSCR_STRING
|
||||
db 'M', 00
|
||||
db 'R', 00
|
||||
db ' ', 00
|
||||
db 'D', 00
|
||||
db 'e', 00
|
||||
db 'v', 00
|
||||
db 'i', 00
|
||||
db 'c', 00
|
||||
db 'e', 00
|
||||
db 's', 00
|
||||
db 00, 00
|
||||
String1End:
|
||||
|
||||
String2:
|
||||
db String2End-String2
|
||||
db DSCR_STRING
|
||||
db 'T', 00
|
||||
db 'r', 00
|
||||
db 'i', 00
|
||||
db 'n', 00
|
||||
db 'i', 00
|
||||
db 't', 00
|
||||
db 'y', 00
|
||||
db 00, 00
|
||||
String2End:
|
||||
|
||||
UserDscr:
|
||||
dw 0000H
|
||||
|
||||
END
|
||||
@@ -0,0 +1,19 @@
|
||||
#include <fx2.h>
|
||||
#include <fx2_regs.h>
|
||||
#include <fx2_i2c.h>
|
||||
#include <fx2_eeprom.h>
|
||||
#include <fx2_syncdelay.h>
|
||||
#include <rtx51tny.h>
|
||||
|
||||
void (*main_hook)() = 0;
|
||||
void (*idle_hook)() = 0;
|
||||
|
||||
// ================================================================================================
|
||||
// global variables
|
||||
// ================================================================================================
|
||||
xdata BYTE devSerialNumber [8] _at_ 0xE000;
|
||||
xdata BYTE devCapabilities [8] _at_ 0xE008;
|
||||
xdata BYTE devIdentifier [8] _at_ 0xE010;
|
||||
|
||||
BYTE xdata sig[2];
|
||||
BYTE xdata crc[2];
|
||||
@@ -0,0 +1,73 @@
|
||||
// ================================================================================================
|
||||
// CY_TRINITY
|
||||
//
|
||||
// CY_TRINITY boards built on Cypress' FX2LP chip, CY7C68013A.
|
||||
// The firmware assumes that, the boards have a 16 kB I2C EEPROM memory at address 0x51.
|
||||
// The last page (32 byte) of the EEPROM is reserved for board identification.
|
||||
// The rest of the EEPROM is reserved for permanent firmware.
|
||||
//
|
||||
// ================================================================================================
|
||||
#include <fx2.h>
|
||||
#include <fx2_regs.h>
|
||||
|
||||
#ifdef RTX51TNY
|
||||
#include <rtx51tny.h>
|
||||
#endif
|
||||
|
||||
extern void tri_conf();
|
||||
extern void tri_boot();
|
||||
|
||||
extern void (*main_hook)();
|
||||
extern void (*idle_hook)();
|
||||
|
||||
// ================================================================================================
|
||||
// main()
|
||||
// ================================================================================================
|
||||
#ifdef RTX51TNY
|
||||
void tri_main(void) _task_ 0
|
||||
#else
|
||||
void main(void)
|
||||
#endif
|
||||
|
||||
{
|
||||
// -------------------------------------------------------------------
|
||||
//
|
||||
// INITIALIZE BASE HARDWARE/ENDPOINTS
|
||||
//
|
||||
// -------------------------------------------------------------------
|
||||
FX2_Init();
|
||||
|
||||
tri_conf();
|
||||
tri_boot();
|
||||
|
||||
// -------------------------------------------------------------------
|
||||
// Renumerate if necessary. Do this by checking the renum bit. If it
|
||||
// is already set, no need to renumerate. The renum bit will already
|
||||
// set if this firmware was loaded from eeprom.
|
||||
// -------------------------------------------------------------------
|
||||
if( !(USBCS & bmRENUM))
|
||||
FX2_Disconnect(true);
|
||||
|
||||
// -------------------------------------------------------------------
|
||||
// Unconditionally re-connect. If we loaded from eeprom we are
|
||||
// disconnected and need to connect. If we just renumerated, this is
|
||||
// not necessary but doesn't hurt anything.
|
||||
// -------------------------------------------------------------------
|
||||
USBCS &= ~bmDISCON;
|
||||
|
||||
// -------------------------------------------------------------------
|
||||
// call main hook for starting board specific tasks, e.g.: jtag
|
||||
// -------------------------------------------------------------------
|
||||
if( main_hook)
|
||||
main_hook();
|
||||
|
||||
// -------------------------------------------------------------------
|
||||
// idle
|
||||
// -------------------------------------------------------------------
|
||||
while(1)
|
||||
{
|
||||
if( idle_hook)
|
||||
idle_hook();
|
||||
}
|
||||
}
|
||||
|
||||
@@ -0,0 +1,131 @@
|
||||
#include <fx2.h>
|
||||
#include <fx2_regs.h>
|
||||
#include <fx2_i2c.h>
|
||||
#include <fx2_eeprom.h>
|
||||
#include <tri.h>
|
||||
//#include <lcd\lcd_7565r.h>
|
||||
|
||||
#define DATAINPTR ((BYTE xdata *)&EP1INBUF [8])
|
||||
#define DATAOUTPTR ((BYTE xdata *)&EP1OUTBUF[8])
|
||||
|
||||
|
||||
//extern BYTE fx2_i2c_read( BYTE, BYTE, BYTE xdata *);
|
||||
|
||||
|
||||
// ================================================================================================
|
||||
// EP1
|
||||
//
|
||||
// Default processing of I2C and EEPROM packets. Inherited EP1 packet handlers normally
|
||||
// don't override I2C and EEPROM packet processing. They implement (most of the time) new
|
||||
// features, which have simple data transfer only. EP1 is not intented to use for transfering
|
||||
// large amount of data, e.g.: jtag, or LA stream.
|
||||
//
|
||||
// BUF[0] : dir[7] + command[6..0]
|
||||
// BUF[1] : address
|
||||
// BUF[2] : address ext
|
||||
// BUF[3] : subaddress[lo]/eeprom page address[lo]
|
||||
// BUF[4] : subaddress[hi]/eeprom page address[lo]
|
||||
// BUF[5] : length (max 32)
|
||||
// BUF[6] : offset
|
||||
// BUF[7] : timeout in ms
|
||||
// ================================================================================================
|
||||
void tri_ep1out( void)
|
||||
{
|
||||
bool rd; // true if eeprom/i2c xfer operation is read
|
||||
BYTE cmd; // the actual command
|
||||
|
||||
WORD address; // device address + address extension
|
||||
WORD subaddr; // sub address for repeated start read
|
||||
WORD page; // eeprom page number
|
||||
BYTE length; // data length
|
||||
BYTE offset; // offset in eeprom page
|
||||
BYTE tmo; // timeout
|
||||
|
||||
// ------------------------------------------------------
|
||||
// parse command
|
||||
// ------------------------------------------------------
|
||||
rd = EP1OUTBUF[0] & 0x80;
|
||||
cmd = EP1OUTBUF[0] & 0x7F;
|
||||
|
||||
address = *(WORD*)&EP1OUTBUF[1]; // I2C address
|
||||
subaddr = *(WORD*)&EP1OUTBUF[3]; // sub address for RS
|
||||
page = *(WORD*)&EP1OUTBUF[3]; // page number
|
||||
length = *(BYTE*)&EP1OUTBUF[5]; // data length
|
||||
offset = *(BYTE*)&EP1OUTBUF[6]; // offset in page
|
||||
tmo = *(BYTE*)&EP1OUTBUF[7]; // timeout
|
||||
|
||||
if( length > 132)
|
||||
length = 132;
|
||||
|
||||
// ------------------------------------------------------
|
||||
// prepare status block
|
||||
// ------------------------------------------------------
|
||||
EP1INBUF[0] = EP1OUTBUF[0];
|
||||
EP1INBUF[1] = EP1OUTBUF[1];
|
||||
EP1INBUF[2] = EP1OUTBUF[2];
|
||||
EP1INBUF[3] = EP1OUTBUF[3];
|
||||
EP1INBUF[4] = EP1OUTBUF[4];
|
||||
EP1INBUF[5] = EP1OUTBUF[5];
|
||||
EP1INBUF[6] = EP1OUTBUF[6];
|
||||
EP1INBUF[7] = I2C_OK;
|
||||
|
||||
if(rd)
|
||||
{
|
||||
switch(cmd)
|
||||
{
|
||||
case CMD_IIC_READ:
|
||||
EP1INBUF[7] = fx2_i2c_read( address, length, DATAINPTR);
|
||||
EP1INBC = 8 +length;
|
||||
break;
|
||||
|
||||
case CMD_IIC_READ_RSW:
|
||||
EP1INBUF[7] = fx2_i2c_read_rsw( address, subaddr, length, DATAINPTR);
|
||||
EP1INBC = 8 +length;
|
||||
break;
|
||||
/*
|
||||
case 1://CMD_EEPROM_BOOT:
|
||||
EP1INBUF[7] = FX2_EEPROM_ReadPage0( 0,8, DATAINPTR);
|
||||
EP1INBC = 8 +8;
|
||||
break;
|
||||
|
||||
case 2://CMD_EEPROM_RAW:
|
||||
EP1INBUF[7] = FX2_EEPROM_ReadPage( page, 32, DATAINPTR);
|
||||
EP1INBC = 8 +32;
|
||||
break;
|
||||
*/
|
||||
default:
|
||||
EP1INBC = 8;
|
||||
}
|
||||
}
|
||||
|
||||
else
|
||||
{
|
||||
// *(WORD*)&EP1INBUF[6] = length;
|
||||
|
||||
switch(cmd)
|
||||
{
|
||||
case CMD_IIC_WRITE:
|
||||
EP1INBUF[7] = fx2_i2c_write( address, length, DATAOUTPTR);
|
||||
/*
|
||||
lcd_gotoxy( 0, 1);
|
||||
lcd_putx2(EP1OUTBUF[0]);
|
||||
lcd_putx2(EP1OUTBUF[1]);
|
||||
lcd_putx2(EP1OUTBUF[2]);
|
||||
lcd_putx2(EP1OUTBUF[3]);
|
||||
lcd_putx2(EP1OUTBUF[4]);
|
||||
lcd_putx2(EP1OUTBUF[5]);
|
||||
lcd_putx2(EP1OUTBUF[6]);
|
||||
lcd_putx2(EP1OUTBUF[7]);
|
||||
*/
|
||||
break;
|
||||
|
||||
case 1://CMD_EEPROM_RAW:
|
||||
EP1INBUF[7] = FX2_EEPROM_WritePage( page, 32, DATAOUTPTR);
|
||||
break;
|
||||
}
|
||||
|
||||
EP1INBC = 8;
|
||||
}
|
||||
|
||||
EP1OUTBC = 0x40; // re-arm EP1OUT
|
||||
}
|
||||
File diff suppressed because one or more lines are too long
@@ -0,0 +1,695 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd">
|
||||
|
||||
<SchemaVersion>1.0</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Extensions>
|
||||
<cExt>*.c</cExt>
|
||||
<aExt>*.s*; *.src; *.a*</aExt>
|
||||
<oExt>*.obj; *.o</oExt>
|
||||
<lExt>*.lib</lExt>
|
||||
<tExt>*.txt; *.h; *.inc</tExt>
|
||||
<pExt>*.plm</pExt>
|
||||
<CppX>*.cpp</CppX>
|
||||
<nMigrate>0</nMigrate>
|
||||
</Extensions>
|
||||
|
||||
<DaveTm>
|
||||
<dwLowDateTime>0</dwLowDateTime>
|
||||
<dwHighDateTime>0</dwHighDateTime>
|
||||
</DaveTm>
|
||||
|
||||
<Target>
|
||||
<TargetName>release</TargetName>
|
||||
<ToolsetNumber>0x0</ToolsetNumber>
|
||||
<ToolsetName>MCS-51</ToolsetName>
|
||||
<TargetOption>
|
||||
<CLK51>48000000</CLK51>
|
||||
<OPTTT>
|
||||
<gFlags>1</gFlags>
|
||||
<BeepAtEnd>0</BeepAtEnd>
|
||||
<RunSim>1</RunSim>
|
||||
<RunTarget>0</RunTarget>
|
||||
<RunAbUc>0</RunAbUc>
|
||||
</OPTTT>
|
||||
<OPTHX>
|
||||
<HexSelection>0</HexSelection>
|
||||
<FlashByte>65535</FlashByte>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
</OPTHX>
|
||||
<OPTLEX>
|
||||
<PageWidth>120</PageWidth>
|
||||
<PageLength>65</PageLength>
|
||||
<TabStop>8</TabStop>
|
||||
<ListingPath>.\lst\release\</ListingPath>
|
||||
</OPTLEX>
|
||||
<ListingPage>
|
||||
<CreateCListing>1</CreateCListing>
|
||||
<CreateAListing>1</CreateAListing>
|
||||
<CreateLListing>1</CreateLListing>
|
||||
<CreateIListing>0</CreateIListing>
|
||||
<AsmCond>1</AsmCond>
|
||||
<AsmSymb>1</AsmSymb>
|
||||
<AsmXref>0</AsmXref>
|
||||
<CCond>1</CCond>
|
||||
<CCode>0</CCode>
|
||||
<CListInc>0</CListInc>
|
||||
<CSymb>0</CSymb>
|
||||
<LinkerCodeListing>0</LinkerCodeListing>
|
||||
</ListingPage>
|
||||
<OPTXL>
|
||||
<LMap>1</LMap>
|
||||
<LComments>1</LComments>
|
||||
<LGenerateSymbols>1</LGenerateSymbols>
|
||||
<LLibSym>1</LLibSym>
|
||||
<LLines>1</LLines>
|
||||
<LLocSym>1</LLocSym>
|
||||
<LPubSym>1</LPubSym>
|
||||
<LXref>0</LXref>
|
||||
<LExpSel>0</LExpSel>
|
||||
</OPTXL>
|
||||
<OPTFL>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<IsCurrentTarget>0</IsCurrentTarget>
|
||||
</OPTFL>
|
||||
<CpuCode>255</CpuCode>
|
||||
<Books>
|
||||
<Book>
|
||||
<Number>0</Number>
|
||||
<Title>Data Sheet</Title>
|
||||
<Path>DATASHTS\CYPRESS\CY7C68XXX_DS.PDF</Path>
|
||||
</Book>
|
||||
<Book>
|
||||
<Number>1</Number>
|
||||
<Title>Technical Reference Manual</Title>
|
||||
<Path>DATASHTS\CYPRESS\FX2_TRM.PDF</Path>
|
||||
</Book>
|
||||
</Books>
|
||||
<DebugOpt>
|
||||
<uSim>1</uSim>
|
||||
<uTrg>0</uTrg>
|
||||
<sLdApp>1</sLdApp>
|
||||
<sGomain>1</sGomain>
|
||||
<sRbreak>1</sRbreak>
|
||||
<sRwatch>1</sRwatch>
|
||||
<sRmem>1</sRmem>
|
||||
<sRfunc>1</sRfunc>
|
||||
<sRbox>1</sRbox>
|
||||
<tLdApp>1</tLdApp>
|
||||
<tGomain>0</tGomain>
|
||||
<tRbreak>1</tRbreak>
|
||||
<tRwatch>1</tRwatch>
|
||||
<tRmem>1</tRmem>
|
||||
<tRfunc>0</tRfunc>
|
||||
<tRbox>1</tRbox>
|
||||
<tRtrace>1</tRtrace>
|
||||
<sRSysVw>1</sRSysVw>
|
||||
<tRSysVw>1</tRSysVw>
|
||||
<sRunDeb>0</sRunDeb>
|
||||
<sLrtime>0</sLrtime>
|
||||
<bEvRecOn>1</bEvRecOn>
|
||||
<bSchkAxf>0</bSchkAxf>
|
||||
<bTchkAxf>0</bTchkAxf>
|
||||
<nTsel>-1</nTsel>
|
||||
<sDll></sDll>
|
||||
<sDllPa></sDllPa>
|
||||
<sDlgDll></sDlgDll>
|
||||
<sDlgPa></sDlgPa>
|
||||
<sIfile></sIfile>
|
||||
<tDll></tDll>
|
||||
<tDllPa></tDllPa>
|
||||
<tDlgDll></tDlgDll>
|
||||
<tDlgPa></tDlgPa>
|
||||
<tIfile></tIfile>
|
||||
<pMon></pMon>
|
||||
</DebugOpt>
|
||||
<Breakpoint/>
|
||||
<Tracepoint>
|
||||
<THDelay>0</THDelay>
|
||||
</Tracepoint>
|
||||
<DebugFlag>
|
||||
<trace>0</trace>
|
||||
<periodic>1</periodic>
|
||||
<aLwin>0</aLwin>
|
||||
<aCover>0</aCover>
|
||||
<aSer1>0</aSer1>
|
||||
<aSer2>0</aSer2>
|
||||
<aPa>0</aPa>
|
||||
<viewmode>0</viewmode>
|
||||
<vrSel>0</vrSel>
|
||||
<aSym>0</aSym>
|
||||
<aTbox>0</aTbox>
|
||||
<AscS1>0</AscS1>
|
||||
<AscS2>0</AscS2>
|
||||
<AscS3>0</AscS3>
|
||||
<aSer3>0</aSer3>
|
||||
<eProf>0</eProf>
|
||||
<aLa>0</aLa>
|
||||
<aPa1>0</aPa1>
|
||||
<AscS4>0</AscS4>
|
||||
<aSer4>0</aSer4>
|
||||
<StkLoc>0</StkLoc>
|
||||
<TrcWin>0</TrcWin>
|
||||
<newCpu>0</newCpu>
|
||||
<uProt>0</uProt>
|
||||
</DebugFlag>
|
||||
<LintExecutable></LintExecutable>
|
||||
<LintConfigFile></LintConfigFile>
|
||||
<bLintAuto>0</bLintAuto>
|
||||
<bAutoGenD>0</bAutoGenD>
|
||||
<LntExFlags>0</LntExFlags>
|
||||
<pMisraName></pMisraName>
|
||||
<pszMrule></pszMrule>
|
||||
<pSingCmds></pSingCmds>
|
||||
<pMultCmds></pMultCmds>
|
||||
<pMisraNamep></pMisraNamep>
|
||||
<pszMrulep></pszMrulep>
|
||||
<pSingCmdsp></pSingCmdsp>
|
||||
<pMultCmdsp></pMultCmdsp>
|
||||
</TargetOption>
|
||||
</Target>
|
||||
|
||||
<Target>
|
||||
<TargetName>debug</TargetName>
|
||||
<ToolsetNumber>0x0</ToolsetNumber>
|
||||
<ToolsetName>MCS-51</ToolsetName>
|
||||
<TargetOption>
|
||||
<CLK51>48000000</CLK51>
|
||||
<OPTTT>
|
||||
<gFlags>1</gFlags>
|
||||
<BeepAtEnd>0</BeepAtEnd>
|
||||
<RunSim>1</RunSim>
|
||||
<RunTarget>0</RunTarget>
|
||||
<RunAbUc>0</RunAbUc>
|
||||
</OPTTT>
|
||||
<OPTHX>
|
||||
<HexSelection>0</HexSelection>
|
||||
<FlashByte>65535</FlashByte>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
</OPTHX>
|
||||
<OPTLEX>
|
||||
<PageWidth>120</PageWidth>
|
||||
<PageLength>65</PageLength>
|
||||
<TabStop>8</TabStop>
|
||||
<ListingPath>.\lst\debug\</ListingPath>
|
||||
</OPTLEX>
|
||||
<ListingPage>
|
||||
<CreateCListing>1</CreateCListing>
|
||||
<CreateAListing>1</CreateAListing>
|
||||
<CreateLListing>1</CreateLListing>
|
||||
<CreateIListing>0</CreateIListing>
|
||||
<AsmCond>1</AsmCond>
|
||||
<AsmSymb>1</AsmSymb>
|
||||
<AsmXref>0</AsmXref>
|
||||
<CCond>1</CCond>
|
||||
<CCode>0</CCode>
|
||||
<CListInc>0</CListInc>
|
||||
<CSymb>0</CSymb>
|
||||
<LinkerCodeListing>0</LinkerCodeListing>
|
||||
</ListingPage>
|
||||
<OPTXL>
|
||||
<LMap>1</LMap>
|
||||
<LComments>1</LComments>
|
||||
<LGenerateSymbols>1</LGenerateSymbols>
|
||||
<LLibSym>1</LLibSym>
|
||||
<LLines>1</LLines>
|
||||
<LLocSym>1</LLocSym>
|
||||
<LPubSym>1</LPubSym>
|
||||
<LXref>0</LXref>
|
||||
<LExpSel>0</LExpSel>
|
||||
</OPTXL>
|
||||
<OPTFL>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<IsCurrentTarget>1</IsCurrentTarget>
|
||||
</OPTFL>
|
||||
<CpuCode>255</CpuCode>
|
||||
<Books>
|
||||
<Book>
|
||||
<Number>0</Number>
|
||||
<Title>Data Sheet</Title>
|
||||
<Path>DATASHTS\CYPRESS\CY7C68XXX_DS.PDF</Path>
|
||||
</Book>
|
||||
<Book>
|
||||
<Number>1</Number>
|
||||
<Title>Technical Reference Manual</Title>
|
||||
<Path>DATASHTS\CYPRESS\FX2_TRM.PDF</Path>
|
||||
</Book>
|
||||
</Books>
|
||||
<DebugOpt>
|
||||
<uSim>1</uSim>
|
||||
<uTrg>0</uTrg>
|
||||
<sLdApp>1</sLdApp>
|
||||
<sGomain>1</sGomain>
|
||||
<sRbreak>1</sRbreak>
|
||||
<sRwatch>1</sRwatch>
|
||||
<sRmem>1</sRmem>
|
||||
<sRfunc>1</sRfunc>
|
||||
<sRbox>1</sRbox>
|
||||
<tLdApp>1</tLdApp>
|
||||
<tGomain>1</tGomain>
|
||||
<tRbreak>1</tRbreak>
|
||||
<tRwatch>1</tRwatch>
|
||||
<tRmem>1</tRmem>
|
||||
<tRfunc>0</tRfunc>
|
||||
<tRbox>1</tRbox>
|
||||
<tRtrace>1</tRtrace>
|
||||
<sRSysVw>1</sRSysVw>
|
||||
<tRSysVw>1</tRSysVw>
|
||||
<sRunDeb>0</sRunDeb>
|
||||
<sLrtime>0</sLrtime>
|
||||
<bEvRecOn>1</bEvRecOn>
|
||||
<bSchkAxf>0</bSchkAxf>
|
||||
<bTchkAxf>0</bTchkAxf>
|
||||
<nTsel>0</nTsel>
|
||||
<sDll></sDll>
|
||||
<sDllPa></sDllPa>
|
||||
<sDlgDll></sDlgDll>
|
||||
<sDlgPa></sDlgPa>
|
||||
<sIfile></sIfile>
|
||||
<tDll></tDll>
|
||||
<tDllPa></tDllPa>
|
||||
<tDlgDll></tDlgDll>
|
||||
<tDlgPa></tDlgPa>
|
||||
<tIfile></tIfile>
|
||||
<pMon>BIN\MON51.DLL</pMon>
|
||||
</DebugOpt>
|
||||
<TargetDriverDllRegistry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>DLGTP51</Key>
|
||||
<Name>(98=-1,-1,-1,-1,0)(82=-1,-1,-1,-1,0)(83=-1,-1,-1,-1,0)(84=-1,-1,-1,-1,0)(85=-1,-1,-1,-1,0)(99=-1,-1,-1,-1,0)(101=-1,-1,-1,-1,0)(91=-1,-1,-1,-1,0)(92=-1,-1,-1,-1,0)(94=-1,-1,-1,-1,0)(104=-1,-1,-1,-1,0)(5065=-1,-1,-1,-1,0)</Name>
|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>MON51</Key>
|
||||
<Name>-S5 -B38400 -O1311</Name>
|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>DLGDP51</Key>
|
||||
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File diff suppressed because it is too large
Load Diff
Reference in New Issue
Block a user