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2026-01-03 19:05:48 +01:00
commit 1254878a31
253 changed files with 30484 additions and 0 deletions
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#include <fx2.h>
extern bool (*DR_VendorCommand)(void);
extern void (*main_hook)(void);
extern void cf1_conf(void);
extern void cf1_main(void);
extern bool cf1_command(void);
void TRI_Boot(void)
{
cf1_conf();
main_hook = cf1_main;
DR_VendorCommand = cf1_command;
}
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#include <fx2.h>
#include <fx2_regs.h>
#include <tri.h>
#include <lcd\lcd_44780.h>
extern bool jtag_command(void);
// ============================================================================
// command
// ============================================================================
bool cf1_command(void)
{
bool result = true;
bit dir = (SETUPDAT[0] & 0x80) ? 1 : 0;
BYTE cmd = SETUPDAT[1]; // (SETUPDAT[1] & 0x7F);
PSUDAV sud = (PSUDAV)SETUPDAT;
BYTE X = SETUPDAT[2];
BYTE Y = SETUPDAT[3];
BYTE C = SETUPDAT[3];
BYTE LED = SETUPDAT[2];
BYTE VAL = SETUPDAT[3];
//#ifdef DEBUG
// lcd_gotoxy(0,0);
// lcd_putx2(cmd);
// lcd_putx2(X);
// lcd_putx2(Y);
// lcd_putled( 3, 1);
//#endif
// ----------------------------------------------------
// IN command device -> host
// ----------------------------------------------------
if(dir)
{
switch(sud->Request)
{
// --------------------------------------------
// default
// --------------------------------------------
default:
result = jtag_command();
break;
}
}
// ----------------------------------------------------
// OUT command host -> device
// ----------------------------------------------------
else
{
switch(sud->Request)
{
// --------------------------------------------
// display commands
// --------------------------------------------
case CMD_LCD_LED:
lcd_putled( LED, VAL);
break;
case CMD_LCD_CLS:
lcd_gotoxy(0,0); lcd_puts(" ");
lcd_gotoxy(0,1); lcd_puts(" ");
break;
case CMD_LCD_GOTOXY:
lcd_gotoxy(X,Y);
break;
case CMD_LCD_PUTC:
lcd_putc(C);
break;
case CMD_LCD_PUTS:
lcd_putc(EP0BUF[0]);
break;
// --------------------------------------------
// default
// --------------------------------------------
default:
result = jtag_command();
break;
}
}
return result;
}
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#include <fx2.h>
#include <fx2_regs.h>
#include <fx2_syncdelay.h>
#include <rtx51tny.h>
#include <tri.h>
#include <lcd\lcd_44780.h>
extern xdata BYTE devSerialNumber [];
extern xdata BYTE devCapabilities [];
extern xdata BYTE devIdentifier [];
extern void FX2_Delay(WORD);
// inherited object routines
extern void jtag_main(void);
extern void jtag_conf(void);
// ================================================================================================
// main
//
// This routine is the place to start tasks !
// ================================================================================================
void cf1_main(void)
{
// -------------------------------------------------------------------
// call "inherited" main()
// -------------------------------------------------------------------
jtag_main();
}
// ================================================================================================
// configure board
// ================================================================================================
void cf1_conf()
{
// ------------------------------------------------------------------------
// call "inherited" config()
// ------------------------------------------------------------------------
jtag_conf();
// ------------------------------------------------------------------------
// set IFCLK to 30 MHz
//
// with 30 MHz the on-board SDRAM can run on 120 MHz
// with 48 MHz the on-board SDRAM can run on 144 or 96 MHz
// ------------------------------------------------------------------------
IFCONFIG &= ~bm3048MHZ; SYNCDELAY; // 30 MHz
// ------------------------------------------------------------------------
// add capabilities
// ------------------------------------------------------------------------
devCapabilities[1] |= bmCap1_LCD;
// ------------------------------------------------------------------------
// Board specific initialization
//
// TRINITY_2:
// - 4 layers board
// - 128 pin mcu
// - 32k SRAM for mcu
// - Lattice FPGA
// - 32M SDRAM for FPGA
// - LCD (44780) & LED port
// - 8 bit expansion port
//
// Not USB powered device. It must monitor USB power for
// correct working. Port C bit 5 is the monitoring bit.
//
// GPIF is not implemented in this firmware. It is just
// a suggestion.
//
// FPGA - programming
//
// bit dir init function
// ------------------------------------------
// PC.0 out 0 TCK
// PC.1 out 1 TMS
// PC.2 out 1 TDI
// PC.3 in - TDO
// PC.4 out 1 PRGn
//
// FPGA - GPIF
//
// bit/pin dir init function
// ------------------------------------------
// PC.6 out 0 GA[0]
// PC.7 out 0 GA[1]
//
// PB.0 in/out - GP[0]
// PB.1 in/out - GP[1]
// PB.2 in/out - GP[2]
// PB.3 in/out - GP[3]
// PB.4 in/out - GP[4]
// PB.5 in/out - GP[5]
// PB.6 in/out - GP[6]
// PB.7 in/out - GP[7]
//
// CTL0 out 0 CTL0
// CTL1 out 0 CTL1
// CTL2 out 0 CTL2
// CTL3 out 0 CTL3
// CTL4 out 0 CTL4
// CTL5 out 0 CTL5
//
// RDY0 in - RDY0
// RDY1 in - RDY1
// RDY2 in - RDY2
// RDY3 in - RDY3
//
// FPGA - MISC
//
// bit dir init function
// ------------------------------------------
// PD.0 out (0) RESET
// IFCK out - CLK
// INT5 in (1) INT
//
//
// LED and LCD display
//
// bit dir init function
// ------------------------------------------
// PD.0 - - (FPGA)
//
// PD.1 out 0 LCD R/W
// PD.2 out 0 LCD R/S
// PD.3 out 0 LCD E
//
// PD.4 out 0 LED 0
// PD.5 out 0 LED 1
// PD.6 out 0 LED 2
// PD.7 out 0 LED 3
//
// PE.0 out 0 LCD D0
// PE.1 out 0 LCD D1
// PE.2 out 0 LCD D2
// PE.3 out 0 LCD D3
// PE.4 out 0 LCD D4
// PE.5 out 0 LCD D5
// PE.6 out 0 LCD D6
// PE.7 out 0 LCD D7
// ------------------------------------------
//
// Expansion Port
//
// bit dir init function
// ------------------------------------------
// PA.0 i/o - PA.0
// PA.1 out 0 PA.1
// PA.2 out 0 PA.2
// PA.3 out 0 PA.3
// PA.4 out 0 PA.4
// PA.5 out 0 PA.5
// PA.6 out 0 PA.6
// PA.7 out 0 PA.7
// ------------------------------------------
//
// MISC
//
// bit dir init function
// ------------------------------------------
// PC.5 in (1) VMON
// PA.0 out 0 debug trigger 1
//
// ------------------------------------------------------------------------
PORTCCFG = 0x00; SYNCDELAY; // port C is I/O, not GPIFADDR
IOC = 0xFE; // set default values
OEC = 0x17; // set port directions
IOA = 0x00; // expansion port
OEA = 0x01; //
devSerialNumber[0] = 'C';
devSerialNumber[1] = '5';
EP0BCL = 0x40; SYNCDELAY;
// -------------------------------------------------------------------
// INITIALIZE LCD
// -------------------------------------------------------------------
lcd_init();
}
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#include <fx2.h>
extern bool (*DR_VendorCommand)(void);
extern void (*main_hook)(void);
extern void cnc1_conf(void);
extern void cnc1_main(void);
extern bool cnc1_command(void);
void tri_boot(void)
{
cnc1_conf();
main_hook = cnc1_main;
DR_VendorCommand = cnc1_command;
}
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#include <fx2.h>
#include <fx2_regs.h>
extern bool cf1_command(void);
// ================================================================================================
// Command
// ================================================================================================
bool cnc1_command(void)
{
bool result = true;
bit dir = (SETUPDAT[0] & 0x80) ? 1 : 0;
BYTE cmd = SETUPDAT[1];
PSUDAV sud = (PSUDAV)SETUPDAT;
// ----------------------------------------------------
// IN command device -> host
// ----------------------------------------------------
if(dir)
{
switch(sud->Request)
{
// --------------------------------------------
// default
// --------------------------------------------
default:
result = cf1_command();
break;
}
}
// ----------------------------------------------------
// OUT command host -> device
// ----------------------------------------------------
else
{
switch(sud->Request)
{
// --------------------------------------------
// default
// --------------------------------------------
default:
result = cf1_command();
break;
}
}
return result;
}
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#include <fx2.h>
#include <fx2_regs.h>
#include <fx2_syncdelay.h>
#include <fx2_i2c.h>
#include <lcd\lcd_44780.h>
#include <tri.h>
extern xdata BYTE devSerialNumber [];
extern xdata BYTE devCapabilities [];
extern xdata BYTE devIdentifier [];
extern void cf1_main(void);
extern void cf1_conf(void);
extern void cnc1_ep6out(void);
xdata BYTE buf[30];
// ================================================================================================
// main
// ================================================================================================
void cnc1_main(void)
{
// ------------------------------------------------------------------------
// call *inherited* main()
// ------------------------------------------------------------------------
cf1_main();
// ------------------------------------------------------------------------
// *cf1* specific main()
// ------------------------------------------------------------------------
lcd_gotoxy(0,0); lcd_puts("X CNC1 X");
lcd_gotoxy(0,1); lcd_puts("M M");
PD7 = 0;
PD6 = 1;
PD5 = 0;
PD4 = 1;
buf[0] = 0;
buf[1] = 0x61;
buf[2] = 0x39;
// fx2_i2c_write( 0x10, 4, buf);
fx2_i2c_write( 0x10, 1, buf);
fx2_i2c_read( 0x10, 4, buf);
lcd_gotoxy( 2, 1);
lcd_putc(buf[0] & 0xDF);
lcd_putc(buf[1] & 0xDF);
lcd_putc(buf[2] & 0xDF);
lcd_putc(buf[3] & 0xDF);
}
// ================================================================================================
// configure
// ================================================================================================
void cnc1_conf(void)
{
// ------------------------------------------------------------------------
// call *inherited* config()
// ------------------------------------------------------------------------
cf1_conf();
// ------------------------------------------------------------------------
// temp serial number
// ------------------------------------------------------------------------
devSerialNumber[0] = 'N';
devSerialNumber[1] = '5';
// ------------------------------------------------------------------------
// Configure EP6/EP8
//
// Endpoint 6 is the OUT endpoint for FPGA communication.
// Endpoint 8 is the IN endpoint for FPGA communication.
// ------------------------------------------------------------------------
EP6CFG = EP_VALID | EP_OUT | EP_BULK | EP_512 | EP_2x; SYNCDELAY;
EP8CFG = EP_VALID | EP_IN | EP_BULK | EP_512 | EP_2x; SYNCDELAY;
// ------------------------------------------------------------------------
// Out endpoints do not come up armed.
// Since the EP6 is double buffered we must write dummy byte
// count twice. Arm EP6 by writing byte count w/skip flag.
// ------------------------------------------------------------------------
EP6BCL = 0x80; SYNCDELAY;
EP6BCL = 0x80; SYNCDELAY;
// ------------------------------------------------------------------------
// Enable EP6/EP8 interrupts
// ------------------------------------------------------------------------
EPIE |= (bmEP6 | bmEP8);
// ------------------------------------------------------------------------
// usb interrupt handler hooks
// ------------------------------------------------------------------------
ep6inout = cnc1_ep6out;
}
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#include <fx2.h>
#include <fx2_regs.h>
#include <tri.h>
// ================================================================================================
// EP6OUT
//
// ================================================================================================
void cnc1_ep6out(void)
{
// ----------------------------------------------------------
// Re-arm output endpoint EP6
// ----------------------------------------------------------
EP6BCL = 0x80;
}
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#include <fx2.h>
extern bool (*DR_VendorCommand)(void);
extern void (*main_hook)(void);
extern void mb_conf(void);
extern void mb_main(void);
extern bool mb_command(void);
void tri_boot(void)
{
mb_conf();
main_hook = mb_main;
DR_VendorCommand = mb_command;
}
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#include <fx2.h>
#include <fx2_regs.h>
extern bool cf1_command(void);
bool mb_command( void)
{
bool result = true;
bit dir = (SETUPDAT[0] & 0x80) ? 1 : 0;
BYTE cmd = SETUPDAT[1];
PSUDAV sud = (PSUDAV)SETUPDAT;
// ----------------------------------------------------
// IN command device -> host
// ----------------------------------------------------
if(dir)
{
switch( sud->Request)
{
// --------------------------------------------
// default
// --------------------------------------------
default:
result = cf1_command();
break;
}
}
// ----------------------------------------------------
// OUT command host -> device
// ----------------------------------------------------
else
{
switch( sud->Request)
{
// --------------------------------------------
// default
// --------------------------------------------
default:
result = cf1_command();
break;
}
}
return result;
}
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#include <fx2.h>
#include <fx2_regs.h>
#include <fx2_i2c.h>
#include <fx2_usart.h>
#include <lcd\lcd_44780.h>
#include <tri.h>
#include <modbus.h>
extern void cf1_main(void);
extern void cf1_conf(void);
BYTE xdata buf[10];
BYTE xdata dly[10];
// =================================================================================================
// configure
// =================================================================================================
void mb_conf( void)
{
// ------------------------------------------------------------------------
// call *inherited* config()
// ------------------------------------------------------------------------
cf1_conf();
// ------------------------------------------------------------------------
// temp serial number
// ------------------------------------------------------------------------
devSerialNumber[0] = 'M';
devSerialNumber[1] = 'B';
devSerialNumber[2] = '1';
devCapabilities[0] |= bmCap0_MBRTU;
devCapabilities[0] |= bmCap0_MBASC;
// TEST only !!!
// ------------------------------------------------------------------------
// initialize serial port
// ------------------------------------------------------------------------
//fx2_usart_init( 9600, uc8e1);
lcd_putled(3,1);
mb_init( mbChannel1, mbRTU, 10, 9600, mbParityEven);
}
void FX2_Delay( WORD ms);
// =================================================================================================
// main
// =================================================================================================
void mb_main( void)
{
int i;
// ------------------------------------------------------------------------
// call *inherited* main()
// ------------------------------------------------------------------------
cf1_main();
// ------------------------------------------------------------------------
// TEST only !!!
// ------------------------------------------------------------------------
// ------------------------------------------------------------------------
// *modbus* specific main()
// ------------------------------------------------------------------------
lcd_gotoxy(0,0); lcd_puts(" MODBUS ");
lcd_gotoxy(0,1); lcd_puts("> -- <");
buf[0] = 0x10;
buf[0] = 0x3;
buf[1] = 40001 >> 8;
buf[2] = 40001 & 0xFF;
buf[3] = 0x00;
buf[4] = 0x01;
buf[5] = 0x11;
buf[6] = 0x22;
buf[7] = 0x33;
dly[0] = 0;
dly[1] = 0;
dly[2] = 0;
dly[3] = 0;
dly[4] = 0;
dly[5] = 0;
dly[6] = 0;
dly[7] = 0;
buf[0] = 31001 >> 8;
buf[1] = 31001;
buf[2] = 0;
buf[3] = 1;
buf[4] = 5;
buf[5] = 5;
// fx2_i2c_write( 0x55, 6, buf);
// fx2_i2c_read( 0x55, 2, buf);
buf[0] = 4;
buf[1] = 31001 >> 8;
buf[2] = 31001;
buf[3] = 0;
buf[4] = 1;
// fx2_usart_send( 4, buf, dly);
// fx2_usart_send( 4, &buf[4], &dly[4]);
// for( i=0; i<35; i++)
// {
// lcd_putled(0,1);
// mb_send( mbChannel1, 2, 5, buf, 0);
// lcd_putled(0,0);
//
// FX2_Delay(100);
//
// }
// --------------------------------------------------------------
// set plc portparameters
// --------------------------------------------------------------
buf[0] = 40006 >> 8; // register address
buf[1] = 40006; //
buf[2] = 0; // number of words
buf[3] = 3; // number of words
buf[4] = 0; // modbus address
buf[5] = 1; //
buf[6] = 0; // speed
buf[7] = 48; //
buf[8] = 0; // config
buf[9] = 1;
fx2_i2c_write( 0x55, 10, buf);
}
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