65 lines
1.6 KiB
C
65 lines
1.6 KiB
C
// ============================================================================
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// FX2LP SFR Registers at 0xB0 - 0xBF
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// ----------------------------------------------------------------------------
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// 0xB0 - IOD
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// 0xB1 - IOE
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// 0xB2 - OEA
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// 0xB3 - OEB
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// 0xB4 - OEC
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// 0xB5 - OED
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// 0xB6 - OEE
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// 0xB7 -
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// 0xB8 - IP
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// 0xB9 -
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// 0xBA - EP01STAT
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// 0xBB - GPIFTRIG
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// 0xBC -
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// 0xBD - GPIFSGL_DATH
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// 0xBE - GPIFSGL_DATLX
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// 0xBF - GPIFSGL_DATLNOX
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// ============================================================================
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#ifndef FX2REGS_SFRBX_H
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#define FX2REGS_SFRBX_H
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sfr IOD = 0xB0;
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sfr IOE = 0xB1;
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sfr OEA = 0xB2;
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sfr OEB = 0xB3;
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sfr OEC = 0xB4;
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sfr OED = 0xB5;
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sfr OEE = 0xB6;
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sfr IP = 0xB8;
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sfr EP01STAT = 0xBA;
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sfr GPIFTRIG = 0xBB;
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sfr GPIFSGLDATH = 0xBD;
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sfr GPIFSGLDATLX = 0xBE;
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sfr GPIFSGLDATLNOX = 0xBF;
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// ------------------------------------
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// PortD (0xB0)
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// ------------------------------------
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sbit PD0 = 0xB0 +0;
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sbit PD1 = 0xB0 +1;
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sbit PD2 = 0xB0 +2;
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sbit PD3 = 0xB0 +3;
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sbit PD4 = 0xB0 +4;
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sbit PD5 = 0xB0 +5;
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sbit PD6 = 0xB0 +6;
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sbit PD7 = 0xB0 +7;
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// ------------------------------------
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// IP bits
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// ------------------------------------
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sbit PX0 = 0xB8 +0;
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sbit PT0 = 0xB8 +1;
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sbit PX1 = 0xB8 +2;
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sbit PT1 = 0xB8 +3;
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sbit PS0 = 0xB8 +4;
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sbit PT2 = 0xB8 +5;
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sbit PS1 = 0xB8 +6;
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#endif
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