318 lines
16 KiB
HTML
318 lines
16 KiB
HTML
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<title>Block Diagram</title>
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<body bgcolor="white" OnLoad="na_preload_img(false, 'images/ChipSel.gif');">
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<table border="0" cellpadding="0" cellspacing="0" width="90%" align="center">
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<tr valign="top">
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<td colspan="1" align="left">
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<p align="center"><font face="Verdana,Arial" size="2" color="black"><b><a name="BlockDiagram"></a>Block
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Diagram </b></font></p>
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</td>
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</tr>
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<tr valign="top">
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<td colspan="1" align="left">
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<p>
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<font face="Verdana,Arial" size="1" color="black"><br>The
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first tab page presents a block diagram representing the logical
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connection of the FX/FX2 to an attached slave device. The
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configuration of this diagram controls the parameters available
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during creation of the four waveform descriptors (on the next 4
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tab pages).<br><br></font>
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<p align="center"><img src="images/BlkDiag.gif" width="432" height="327" border="0"></p>
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<p align="left"><font face="Verdana,Arial" size="1" color="black"><br>For
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instance, the number of CTL lines available when creating a waveform
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is configured using the block diagram. <br><br>Only one block diagram
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is saved in any GPIF Designer project file (*.GPF).<br><br>Once
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waveforms have been designed, changing the block diagram may give
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rise to undesired changes in the waveforms. For this
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reason, it is highly recommended that <b>the first step</b> in designing
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GPIF waveforms be the <b>proper configuration of the Block
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Diagram</b>.<br><br></font></p>
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</td>
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</tr>
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<tr valign="top">
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<td colspan="1" align="left">
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<font face="Verdana,Arial" size="1" color="black"><b><a name="Chip"></a>Chip
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Selection</b></font> </td>
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</tr>
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<tr valign="top">
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<td colspan="1" align="left">
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<p>
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<font face="Verdana,Arial" size="1" color="black">The
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first step in configuration of the block diagram should be to
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designate the Cypress FX/FX2 chip and pin-package for which
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you will be designing.</font>
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<p><font face="Verdana,Arial" size="1" color="black">The large,
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blue, left rectange represents the FX/FX2 chip. Right-click
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in the main body of that rectangle to bring-up the chip-selection
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dialog box.<br>
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</font></p>
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<p align="center"><a href="#" OnMouseOut="na_restore_img_src('image1', 'document')" OnMouseOver="na_change_img_src('image1', 'document', 'images/ChipSel.gif', true);"><font face="Verdana" size="1" color="black"><img src="images/ChipSel.gif" width="432" height="327" border="0" name="image1"></font></a></p>
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<p><font face="Verdana,Arial" size="1" color="black">Changing
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chips, after waveforms have already been configured, will not
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erase those waveforms. However, because the available
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CTL and RDY lines may have changed, those waveforms may no longer
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represent what the designer had in mind. If you change
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chips after having designed waveforms, you should re-visit each
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waveform (paying special attention to STATUS and CTL Action
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Points) to verify their correctness.<br> </font></p>
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</td>
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</tr>
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<tr valign="top">
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<td colspan="1" align="left">
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<font face="Verdana,Arial" size="1" color="black"><b><a name="Slave"></a>Slave
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Labeling</b></font> </td>
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</tr>
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<tr valign="top">
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<td colspan="1" align="left">
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<p>
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<font face="Verdana,Arial" size="1" color="black">The
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large, blue, right rectangle represents the device attached
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to the FX/FX2 chip. The label of this device can be modified
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by right-clicking in the main body of the rectangle.</font>
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<p><font face="Verdana,Arial" size="1" color="black">The label
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of the slave block has no impact whatever on the waveform generation.
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It is provided as a matter of convenience only. The
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label is saved, along with the block diagram, in GPIF Designer
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project files (*.GPF).<br> </font></p>
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</td>
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</tr>
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<tr valign="top">
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<td colspan="1" align="left" height="13">
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<font face="Verdana,Arial" size="1" color="black"><b><a name="Clock"></a>Clock
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Settings</b></font> </td>
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</tr>
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<tr valign="top">
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<td colspan="1" align="left">
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<p align="left">
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<font face="Verdana,Arial" size="1" color="black">Right-click
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on the Clock display area of the block diagram to bring-up the
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Clock Properties dialog box.</font>
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<p align="center"><font face="Verdana,Arial" size="1" color="black"><br><img src="images/ConfigClk.gif" width="432" height="327" border="0"> </font></p>
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<p><font face="Verdana,Arial" size="1" color="black">The <b>Internal
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/ External</b> radio buttons of the dialog control the setting
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of the IFCLKSRC bit (b7) of the IFCONFIG register.</font></p>
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<p><font face="Verdana,Arial" size="1" color="black">The <b>Invert
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Clock</b> checkbox (FX2 only) controls the setting of the IFCLKPOL
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bit (b4) of the IFCONFIG register.</font></p>
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<p><font face="Verdana,Arial" size="1" color="black">The <b>IFCLK
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Output</b> checkbox (FX2 only) controls the setting of the IFCLKOE
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bit (b5) of the IFCONFIG register.</font></p>
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<p><font face="Verdana,Arial" size="1" color="black">The <b>30MHz
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/ 48MHz </b>radio buttons (only available if Internal clock
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is selected) control the setting of the 3048MHZ bit (b6) of
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the IFCONFIG register.</font></p>
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<p align="center"><font face="Verdana,Arial" size="1" color="black"><img src="images/ConfigClk2.gif" width="432" height="327" border="0"> </font></p>
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<p><font face="Verdana,Arial" size="1" color="black">When
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External Clock is selected, the <b>Clock Frequency</b> is only
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used
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to calculate the DeltaT displayed on the waveform editor tab
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pages. This setting has no impact on the GPIF waveform
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descriptor data that is exported to a GPIF.c file. Rather,
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it is useful to correctly depict time intervals during waveform
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editing.<br> </font></p>
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</td>
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</tr>
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<tr valign="top">
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<td colspan="1" align="left">
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<font face="Verdana,Arial" size="1" color="black"><b><a name="DataBus"></a>Data
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Bus Selection</b></font> </td>
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</tr>
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<tr valign="top">
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<td colspan="1" align="left">
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<p>
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<font face="Verdana,Arial" size="1" color="black">The
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second black data band, labelled Data [15:8], can be visually
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enabled and disabled by right-clicking on that band.<br><br>This
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setting has no impact on any of the rest of the program or on
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the waveform descriptor data generated using the Tools | Export
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function.<br> </font> </td>
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</tr>
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<tr valign="top">
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<td colspan="1" align="left">
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<font face="Verdana,Arial" size="1" color="black"><b><a name="ADRLines"></a>ADR
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Line Configuration</b></font> </td>
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</tr>
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<tr valign="top">
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<td colspan="1" align="left">
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<p>
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<font face="Verdana,Arial" size="1" color="black">Right-click
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on the group of ADR lines to bring-up the Config ADR Lines dialog
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box. The dialog enables individual or group selection
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of the address lines.<br><br>Like the Data Bus control, these
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settings have no implact on the rest of the program or on the
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waveform descriptor data generated by the Tools | Export function.
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They serve only to provide a visual reminder of the actual
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hardware application for which the waveform descriptors were
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designed.<br> </font> </td>
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</tr>
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<tr valign="top">
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<td colspan="1" align="left">
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<font face="Verdana,Arial" size="1" color="black"><b><a name="RDYLines"></a>RDY
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Line Configuration</b></font> </td>
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</tr>
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<tr valign="top">
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<td colspan="1" align="left" height="464">
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<p>
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<font face="Verdana,Arial" size="1" color="black">The
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RDY lines are used in the definition of </font><a href="WavefmEditors.htm#Status_APs"><font face="Verdana,Arial" size="1" color="black">STATUS
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Action Points</font></a><font face="Verdana,Arial" size="1" color="black">
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(also known as Decision Points) in the waveform editors. The names
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of the selected RDY lines are presented in the list of operands
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for a decision point. So, the proper configuration of
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the RDY lines is important.<br><br>To bring-up the Config RDY
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Lines dialog, right click on any of the block diagram's RDY lines.</font>
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<p align="center"><img src="images/ConfigRDY.gif" width="432" height="327" border="0"></p>
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<p align="left"><font face="Verdana,Arial" size="1" color="black"><br><br>The
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internal <b>FIFO Flag</b> is always available in the list of
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operands for a decision point. This dialog only allows
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you to change the name for this status line that will appear
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in the operand list. [When defining a waveform decision
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point, selection of the FIFO Flag operand will generate a value
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of 6 in the respective TERMA or TERMB fields of the
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LOGIC FUNCTION register for the state instruction.]<br><br>The
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<b>Internal RDY</b> line is always available in the list
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of operands for a decision point. This dialog only allows
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you to change the name for this status line that will appear
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in the operand list. [When defining a waveform decision
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point, selection of the Internal RDY operand will generate a
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value of 7 in the respective TERMA or TERMB fields
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of the LOGIC FUNCTION register for the state instruction.]<br><br>The
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<b>Init val of Internal RDY</b> radio buttons control the initial
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value of the Internal RDY status line. [They designate
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the initial value of the INTRDY bit (b7) of the GPIFREADYCFG
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register.]<br><br>Check the <b>Sync RDY to IFCLK</b> box if
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the RDY signals are synchronized to the internal clock signal.
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[Checking this box causes the SAS bit (b6) of GPIFREADYCFG
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to be set to 1.]<br><br>The transaction counter (TC) can be
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substituted for RDY line #5. Check the <b>Subst TC for
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RDY 5</b> checkbox to implement the substitution. When
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this box is checked, RDY 5 becomes permanently available in
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the list of decision point operands. When the <b>Subst
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TC for RDY 5</b> box is checked, the program places a default
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label of TCXpire for line #5. This label can be modified,
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even though RDY line #5 cannot be de-selected. [Checking
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this box sets the TCXRDY5 bit (b5) of the GPIFREADYCFG register
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to 1.]<br><br>The <b>External Inputs</b> can all be individually
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selected and labelled. Only the labels for selected lines
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are presented in the list of operands for a decision point.
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[When defining a waveform decision point, selection of
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the External Input RDY lines as an operand will generate
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a value between 0 and 5 in the respective TERMA or TERMB fields
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of the LOGIC FUNCTION register for the state instruction.]<br> </font></p>
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</td>
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</tr>
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<tr valign="top">
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<td colspan="1" align="left">
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<font face="Verdana,Arial" size="1" color="black"><b><a name="CTLLines"></a>CTL
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Line Configuration</b></font> </td>
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</tr>
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<tr valign="top">
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<td colspan="1" align="left">
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<p>
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<font face="Verdana,Arial" size="1" color="black">To
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configure the CTL lines, right click on any of the block diagram's CTL lines.</font>
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<p align="center"><img src="images/ConfigCTL.gif" width="432" height="327" border="0"></p>
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<p><font face="Verdana,Arial" size="1" color="black">The <b>Lines
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Can Be Tri-Stated?</b> radio buttons significantly impact the
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options available for CTL lines in both the block diagram and
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the waveform editors. If the lines can be tri-stated,
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a maximum of 4 CTL lines are available (3 for the 56-pin FX2).
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Also, tri-stateable lines cannot be configured for Open-drain
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output. [These Tri-Stated? radio buttons control the value of
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the TRICTL bit (b7) of the GPIFCTLCFG register.]<br><br>Once
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the <b>Lines Can Be Tri-Stated?</b> selection has been made,
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the CTL lines to be used should be selected and labelled. Only
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selected lines will be displayed and actionable in the waveform
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editors.<br><br></font><a href="WavefmEditors.htm#CTRL_APs"><font face="Verdana,Arial" size="1" color="black">CTL Action Points</font></a><font face="Verdana,Arial" size="1" color="black"> placed on the waveforms
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have 2 or 3 available actions, depending on whether or not the
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lines have been configured as tri-stateable here.<br><br>If
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the lines cannot be tri-stated, select the output (<b>CMOS vs
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Open-drain</b>) for each line. [Bits 0-5 of GPIFCTLCFG
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register are set to 1, for the respective CTL lines, if Open-drain
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is selected. Selecting CMOS sets the respective bits to
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0.]</font></p>
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</td>
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</tr>
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</table>
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<p><font face="Verdana" size="1" color="black"> </font></p>
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</font>
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</body>
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</html>
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