Initial check in
This commit is contained in:
@@ -0,0 +1,16 @@
|
||||
/************************************************************************/
|
||||
/* File Version: V1.00 */
|
||||
/* Date Generated: 10/09/2013 */
|
||||
/************************************************************************/
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
extern void HardwareSetup(void);
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
void HardwareSetup(void)
|
||||
{
|
||||
|
||||
}
|
||||
@@ -0,0 +1,140 @@
|
||||
/************************************************************************/
|
||||
/* Header file generated from device file: */
|
||||
/* DR5F1026A.DVF */
|
||||
/* V1.12 (2012/04/03) */
|
||||
/* Copyright(C) 2012 Renesas */
|
||||
/* Tool Version: 4.0.0 */
|
||||
/* Date Generated: 2020/01/17 */
|
||||
/************************************************************************/
|
||||
#ifndef INTERRUPT_HANDLERS_H
|
||||
#define INTERRUPT_HANDLERS_H
|
||||
|
||||
/*
|
||||
* INT_WDTI (0x4)
|
||||
*/
|
||||
void INT_WDTI(void) __attribute__ ((interrupt));
|
||||
|
||||
|
||||
/*
|
||||
* INT_LVI (0x6)
|
||||
*/
|
||||
void INT_LVI(void) __attribute__ ((interrupt));
|
||||
|
||||
/*
|
||||
* INT_P0 (0x8)
|
||||
*/
|
||||
void INT_P0(void) __attribute__ ((interrupt));
|
||||
|
||||
/*
|
||||
* INT_P1 (0xA)
|
||||
*/
|
||||
void INT_P1(void) __attribute__ ((interrupt));
|
||||
|
||||
/*
|
||||
* INT_P2 (0xC)
|
||||
*/
|
||||
void INT_P2(void) __attribute__ ((interrupt));
|
||||
|
||||
/*
|
||||
* INT_P3 (0xE)
|
||||
*/
|
||||
void INT_P3(void) __attribute__ ((interrupt));
|
||||
|
||||
/*
|
||||
* INT_DMA0 (0x10)
|
||||
*/
|
||||
void INT_DMA0(void) __attribute__ ((interrupt));
|
||||
|
||||
/*
|
||||
* INT_DMA1 (0x12)
|
||||
*/
|
||||
void INT_DMA1(void) __attribute__ ((interrupt));
|
||||
|
||||
/*
|
||||
* INT_CSI00/INT_IIC00/INT_ST0 (0x14)
|
||||
*/
|
||||
void INT_ST0(void) __attribute__ ((interrupt));
|
||||
//void INT_CSI00(void) __attribute__ ((interrupt));
|
||||
//void INT_IIC00(void) __attribute__ ((interrupt));
|
||||
|
||||
/*
|
||||
* INT_CSI01/INT_IIC01/INT_SR0 (0x16)
|
||||
*/
|
||||
void INT_SR0(void) __attribute__ ((interrupt));
|
||||
//void INT_CSI01(void) __attribute__ ((interrupt));
|
||||
//void INT_IIC01(void) __attribute__ ((interrupt));
|
||||
|
||||
/*
|
||||
* INT_SRE0 (0x18)
|
||||
*/
|
||||
void INT_SRE0(void) __attribute__ ((interrupt));
|
||||
|
||||
/*
|
||||
* INT_TM01H (0x1A)
|
||||
*/
|
||||
void INT_TM01H(void) __attribute__ ((interrupt));
|
||||
|
||||
/*
|
||||
* INT_TM03H (0x1C)
|
||||
*/
|
||||
void INT_TM03H(void) __attribute__ ((interrupt));
|
||||
|
||||
/*
|
||||
* INT_IICA0 (0x1E)
|
||||
*/
|
||||
void INT_IICA0(void) __attribute__ ((interrupt));
|
||||
|
||||
/*
|
||||
* INT_TM00 (0x20)
|
||||
*/
|
||||
void INT_TM00(void) __attribute__ ((interrupt));
|
||||
|
||||
/*
|
||||
* INT_TM01 (0x22)
|
||||
*/
|
||||
void INT_TM01(void) __attribute__ ((interrupt));
|
||||
|
||||
/*
|
||||
* INT_TM02 (0x24)
|
||||
*/
|
||||
void INT_TM02(void) __attribute__ ((interrupt));
|
||||
|
||||
/*
|
||||
* INT_TM03 (0x26)
|
||||
*/
|
||||
void INT_TM03(void) __attribute__ ((interrupt));
|
||||
|
||||
/*
|
||||
* INT_AD (0x28)
|
||||
*/
|
||||
void INT_AD(void) __attribute__ ((interrupt));
|
||||
|
||||
/*
|
||||
* INT_IT (0x2A)
|
||||
*/
|
||||
void INT_IT(void) __attribute__ ((interrupt));
|
||||
|
||||
/*
|
||||
* INT_KR (0x2C)
|
||||
*/
|
||||
void INT_KR(void) __attribute__ ((interrupt));
|
||||
|
||||
/*
|
||||
* INT_MD (0x2E)
|
||||
*/
|
||||
void INT_MD(void) __attribute__ ((interrupt));
|
||||
|
||||
/*
|
||||
* INT_FL (0x30)
|
||||
*/
|
||||
void INT_FL(void) __attribute__ ((interrupt));
|
||||
|
||||
/*
|
||||
* INT_BRK_I (0x7E)
|
||||
*/
|
||||
void INT_BRK_I(void) __attribute__ ((interrupt));
|
||||
|
||||
//Hardware Vectors
|
||||
//PowerON_Reset (0x0)
|
||||
void PowerON_Reset(void) __attribute__ ((interrupt));
|
||||
#endif
|
||||
@@ -0,0 +1,136 @@
|
||||
/************************************************************************/
|
||||
/* Header file generated from device file: */
|
||||
/* DR5F1026A.DVF */
|
||||
/* V1.12 (2012/04/03) */
|
||||
/* Copyright(C) 2012 Renesas */
|
||||
/* Tool Version: 4.0.0 */
|
||||
/* Date Generated: 2020/01/17 */
|
||||
/************************************************************************/
|
||||
#include "interrupt_handlers.h"
|
||||
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* INT_WDTI (0x4)
|
||||
*/
|
||||
void INT_WDTI (void) { }
|
||||
|
||||
/*
|
||||
* INT_LVI (0x6)
|
||||
*/
|
||||
void INT_LVI (void) { }
|
||||
|
||||
/*
|
||||
* INT_P0 (0x8)
|
||||
*/
|
||||
void INT_P0 (void) { }
|
||||
|
||||
/*
|
||||
* INT_P1 (0xA)
|
||||
*/
|
||||
void INT_P1 (void) { }
|
||||
|
||||
/*
|
||||
* INT_P2 (0xC)
|
||||
*/
|
||||
void INT_P2 (void) { }
|
||||
|
||||
/*
|
||||
* INT_P3 (0xE)
|
||||
*/
|
||||
void INT_P3 (void) { }
|
||||
|
||||
/*
|
||||
* INT_DMA0 (0x10)
|
||||
*/
|
||||
void INT_DMA0 (void) { }
|
||||
|
||||
/*
|
||||
* INT_DMA1 (0x12)
|
||||
*/
|
||||
void INT_DMA1 (void) { }
|
||||
|
||||
/*
|
||||
* INT_CSI00/INT_IIC00/INT_ST0 (0x14)
|
||||
*/
|
||||
void INT_ST0 (void) { }
|
||||
//void INT_CSI00 (void) { }
|
||||
//void INT_IIC00 (void) { }
|
||||
|
||||
/*
|
||||
* INT_CSI01/INT_IIC01/INT_SR0 (0x16)
|
||||
*/
|
||||
void INT_SR0 (void) { }
|
||||
//void INT_CSI01 (void) { }
|
||||
//void INT_IIC01 (void) { }
|
||||
|
||||
/*
|
||||
* INT_SRE0 (0x18)
|
||||
*/
|
||||
void INT_SRE0 (void) { }
|
||||
|
||||
/*
|
||||
* INT_TM01H (0x1A)
|
||||
*/
|
||||
void INT_TM01H (void) { }
|
||||
|
||||
/*
|
||||
* INT_TM03H (0x1C)
|
||||
*/
|
||||
void INT_TM03H (void) { }
|
||||
|
||||
/*
|
||||
* INT_IICA0 (0x1E)
|
||||
*/
|
||||
void INT_IICA0 (void) { }
|
||||
|
||||
/*
|
||||
* INT_TM00 (0x20)
|
||||
*/
|
||||
void INT_TM00 (void) { }
|
||||
|
||||
/*
|
||||
* INT_TM01 (0x22)
|
||||
*/
|
||||
void INT_TM01 (void) { }
|
||||
|
||||
/*
|
||||
* INT_TM02 (0x24)
|
||||
*/
|
||||
void INT_TM02 (void) { }
|
||||
|
||||
/*
|
||||
* INT_TM03 (0x26)
|
||||
*/
|
||||
void INT_TM03 (void) { }
|
||||
|
||||
/*
|
||||
* INT_AD (0x28)
|
||||
*/
|
||||
void INT_AD (void) { }
|
||||
|
||||
/*
|
||||
* INT_IT (0x2A)
|
||||
*/
|
||||
void INT_IT (void) { }
|
||||
|
||||
/*
|
||||
* INT_KR (0x2C)
|
||||
*/
|
||||
void INT_KR (void) { }
|
||||
|
||||
/*
|
||||
* INT_MD (0x2E)
|
||||
*/
|
||||
void INT_MD (void) { }
|
||||
|
||||
/*
|
||||
* INT_FL (0x30)
|
||||
*/
|
||||
void INT_FL (void) { }
|
||||
|
||||
/*
|
||||
* INT_BRK_I (0x7E)
|
||||
*/
|
||||
void INT_BRK_I (void) { }
|
||||
@@ -0,0 +1,591 @@
|
||||
/************************************************************************/
|
||||
/* Header file generated from device file: */
|
||||
/* DR5F1026A.DVF */
|
||||
/* V1.12b (2022/09/15) */
|
||||
/* Copyright(C) 2022 Renesas */
|
||||
/* Tool Version: 4.0.5 */
|
||||
/* Date Generated: 2021/03/09 */
|
||||
/************************************************************************/
|
||||
|
||||
#ifndef __INTRINSIC_FUNCTIONS
|
||||
#define __INTRINSIC_FUNCTIONS
|
||||
|
||||
#define DI() __builtin_rl78_di()
|
||||
#define EI() __builtin_rl78_ei()
|
||||
#define HALT() __halt()
|
||||
#define NOP() __nop()
|
||||
#define STOP() __stop()
|
||||
|
||||
#endif
|
||||
|
||||
#ifndef __IOREG_BIT_STRUCTURES
|
||||
#define __IOREG_BIT_STRUCTURES
|
||||
typedef struct {
|
||||
unsigned char no0 :1;
|
||||
unsigned char no1 :1;
|
||||
unsigned char no2 :1;
|
||||
unsigned char no3 :1;
|
||||
unsigned char no4 :1;
|
||||
unsigned char no5 :1;
|
||||
unsigned char no6 :1;
|
||||
unsigned char no7 :1;
|
||||
} __BITS8;
|
||||
|
||||
typedef struct {
|
||||
unsigned short no0 :1;
|
||||
unsigned short no1 :1;
|
||||
unsigned short no2 :1;
|
||||
unsigned short no3 :1;
|
||||
unsigned short no4 :1;
|
||||
unsigned short no5 :1;
|
||||
unsigned short no6 :1;
|
||||
unsigned short no7 :1;
|
||||
unsigned short no8 :1;
|
||||
unsigned short no9 :1;
|
||||
unsigned short no10 :1;
|
||||
unsigned short no11 :1;
|
||||
unsigned short no12 :1;
|
||||
unsigned short no13 :1;
|
||||
unsigned short no14 :1;
|
||||
unsigned short no15 :1;
|
||||
} __BITS16;
|
||||
|
||||
#endif
|
||||
|
||||
#ifndef IODEFINE_H
|
||||
#define IODEFINE_H
|
||||
|
||||
/*
|
||||
IO Registers
|
||||
*/
|
||||
union un_p1 {
|
||||
unsigned char p1;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_p2 {
|
||||
unsigned char p2;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_p4 {
|
||||
unsigned char p4;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_p6 {
|
||||
unsigned char p6;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_p12 {
|
||||
unsigned char p12;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_p13 {
|
||||
unsigned char p13;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_pm1 {
|
||||
unsigned char pm1;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_pm2 {
|
||||
unsigned char pm2;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_pm4 {
|
||||
unsigned char pm4;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_pm6 {
|
||||
unsigned char pm6;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_adm0 {
|
||||
unsigned char adm0;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_ads {
|
||||
unsigned char ads;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_adm1 {
|
||||
unsigned char adm1;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_krctl {
|
||||
unsigned char krctl;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_krm0 {
|
||||
unsigned char krm0;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_egp0 {
|
||||
unsigned char egp0;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_egn0 {
|
||||
unsigned char egn0;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_iics0 {
|
||||
unsigned char iics0;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_iicf0 {
|
||||
unsigned char iicf0;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_csc {
|
||||
unsigned char csc;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_ostc {
|
||||
unsigned char ostc;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_ckc {
|
||||
unsigned char ckc;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_cks0 {
|
||||
unsigned char cks0;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_lvim {
|
||||
unsigned char lvim;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_lvis {
|
||||
unsigned char lvis;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_dmc0 {
|
||||
unsigned char dmc0;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_dmc1 {
|
||||
unsigned char dmc1;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_drc0 {
|
||||
unsigned char drc0;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_drc1 {
|
||||
unsigned char drc1;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_if0 {
|
||||
unsigned short if0;
|
||||
__BITS16 BIT;
|
||||
};
|
||||
union un_if0l {
|
||||
unsigned char if0l;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_if0h {
|
||||
unsigned char if0h;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_if1 {
|
||||
unsigned short if1;
|
||||
__BITS16 BIT;
|
||||
};
|
||||
union un_if1l {
|
||||
unsigned char if1l;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_mk0 {
|
||||
unsigned short mk0;
|
||||
__BITS16 BIT;
|
||||
};
|
||||
union un_mk0l {
|
||||
unsigned char mk0l;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_mk0h {
|
||||
unsigned char mk0h;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_mk1 {
|
||||
unsigned short mk1;
|
||||
__BITS16 BIT;
|
||||
};
|
||||
union un_mk1l {
|
||||
unsigned char mk1l;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_pr00 {
|
||||
unsigned short pr00;
|
||||
__BITS16 BIT;
|
||||
};
|
||||
union un_pr00l {
|
||||
unsigned char pr00l;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_pr00h {
|
||||
unsigned char pr00h;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_pr01 {
|
||||
unsigned short pr01;
|
||||
__BITS16 BIT;
|
||||
};
|
||||
union un_pr01l {
|
||||
unsigned char pr01l;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_pr10 {
|
||||
unsigned short pr10;
|
||||
__BITS16 BIT;
|
||||
};
|
||||
union un_pr10l {
|
||||
unsigned char pr10l;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_pr10h {
|
||||
unsigned char pr10h;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_pr11 {
|
||||
unsigned short pr11;
|
||||
__BITS16 BIT;
|
||||
};
|
||||
union un_pr11l {
|
||||
unsigned char pr11l;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_pmc {
|
||||
unsigned char pmc;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
|
||||
#define P1 (*(volatile union un_p1 *)0xFFF01).p1
|
||||
#define P1_bit (*(volatile union un_p1 *)0xFFF01).BIT
|
||||
#define P2 (*(volatile union un_p2 *)0xFFF02).p2
|
||||
#define P2_bit (*(volatile union un_p2 *)0xFFF02).BIT
|
||||
#define P4 (*(volatile union un_p4 *)0xFFF04).p4
|
||||
#define P4_bit (*(volatile union un_p4 *)0xFFF04).BIT
|
||||
#define P6 (*(volatile union un_p6 *)0xFFF06).p6
|
||||
#define P6_bit (*(volatile union un_p6 *)0xFFF06).BIT
|
||||
#define P12 (*(volatile union un_p12 *)0xFFF0C).p12
|
||||
#define P12_bit (*(volatile union un_p12 *)0xFFF0C).BIT
|
||||
#define P13 (*(volatile union un_p13 *)0xFFF0D).p13
|
||||
#define P13_bit (*(volatile union un_p13 *)0xFFF0D).BIT
|
||||
#define SDR00 (*(volatile unsigned short *)0xFFF10)
|
||||
#define SIO00 (*(volatile unsigned char *)0xFFF10)
|
||||
#define TXD0 (*(volatile unsigned char *)0xFFF10)
|
||||
#define SDR01 (*(volatile unsigned short *)0xFFF12)
|
||||
#define RXD0 (*(volatile unsigned char *)0xFFF12)
|
||||
#define SIO01 (*(volatile unsigned char *)0xFFF12)
|
||||
#define TDR00 (*(volatile unsigned short *)0xFFF18)
|
||||
#define TDR01 (*(volatile unsigned short *)0xFFF1A)
|
||||
#define TDR01L (*(volatile unsigned char *)0xFFF1A)
|
||||
#define TDR01H (*(volatile unsigned char *)0xFFF1B)
|
||||
#define ADCR (*(volatile unsigned short *)0xFFF1E)
|
||||
#define ADCRH (*(volatile unsigned char *)0xFFF1F)
|
||||
#define PM1 (*(volatile union un_pm1 *)0xFFF21).pm1
|
||||
#define PM1_bit (*(volatile union un_pm1 *)0xFFF21).BIT
|
||||
#define PM2 (*(volatile union un_pm2 *)0xFFF22).pm2
|
||||
#define PM2_bit (*(volatile union un_pm2 *)0xFFF22).BIT
|
||||
#define PM4 (*(volatile union un_pm4 *)0xFFF24).pm4
|
||||
#define PM4_bit (*(volatile union un_pm4 *)0xFFF24).BIT
|
||||
#define PM6 (*(volatile union un_pm6 *)0xFFF26).pm6
|
||||
#define PM6_bit (*(volatile union un_pm6 *)0xFFF26).BIT
|
||||
#define ADM0 (*(volatile union un_adm0 *)0xFFF30).adm0
|
||||
#define ADM0_bit (*(volatile union un_adm0 *)0xFFF30).BIT
|
||||
#define ADS (*(volatile union un_ads *)0xFFF31).ads
|
||||
#define ADS_bit (*(volatile union un_ads *)0xFFF31).BIT
|
||||
#define ADM1 (*(volatile union un_adm1 *)0xFFF32).adm1
|
||||
#define ADM1_bit (*(volatile union un_adm1 *)0xFFF32).BIT
|
||||
#define KRCTL (*(volatile union un_krctl *)0xFFF34).krctl
|
||||
#define KRCTL_bit (*(volatile union un_krctl *)0xFFF34).BIT
|
||||
#define KRF (*(volatile unsigned char *)0xFFF35)
|
||||
#define KRM0 (*(volatile union un_krm0 *)0xFFF37).krm0
|
||||
#define KRM0_bit (*(volatile union un_krm0 *)0xFFF37).BIT
|
||||
#define EGP0 (*(volatile union un_egp0 *)0xFFF38).egp0
|
||||
#define EGP0_bit (*(volatile union un_egp0 *)0xFFF38).BIT
|
||||
#define EGN0 (*(volatile union un_egn0 *)0xFFF39).egn0
|
||||
#define EGN0_bit (*(volatile union un_egn0 *)0xFFF39).BIT
|
||||
#define IICA0 (*(volatile unsigned char *)0xFFF50)
|
||||
#define IICS0 (*(volatile union un_iics0 *)0xFFF51).iics0
|
||||
#define IICS0_bit (*(volatile union un_iics0 *)0xFFF51).BIT
|
||||
#define IICF0 (*(volatile union un_iicf0 *)0xFFF52).iicf0
|
||||
#define IICF0_bit (*(volatile union un_iicf0 *)0xFFF52).BIT
|
||||
#define TDR02 (*(volatile unsigned short *)0xFFF64)
|
||||
#define TDR03 (*(volatile unsigned short *)0xFFF66)
|
||||
#define TDR03L (*(volatile unsigned char *)0xFFF66)
|
||||
#define TDR03H (*(volatile unsigned char *)0xFFF67)
|
||||
#define ITMC (*(volatile unsigned short *)0xFFF90)
|
||||
#define CMC (*(volatile unsigned char *)0xFFFA0)
|
||||
#define CSC (*(volatile union un_csc *)0xFFFA1).csc
|
||||
#define CSC_bit (*(volatile union un_csc *)0xFFFA1).BIT
|
||||
#define OSTC (*(volatile union un_ostc *)0xFFFA2).ostc
|
||||
#define OSTC_bit (*(volatile union un_ostc *)0xFFFA2).BIT
|
||||
#define OSTS (*(volatile unsigned char *)0xFFFA3)
|
||||
#define CKC (*(volatile union un_ckc *)0xFFFA4).ckc
|
||||
#define CKC_bit (*(volatile union un_ckc *)0xFFFA4).BIT
|
||||
#define CKS0 (*(volatile union un_cks0 *)0xFFFA5).cks0
|
||||
#define CKS0_bit (*(volatile union un_cks0 *)0xFFFA5).BIT
|
||||
#define RESF (*(volatile unsigned char *)0xFFFA8)
|
||||
#define LVIM (*(volatile union un_lvim *)0xFFFA9).lvim
|
||||
#define LVIM_bit (*(volatile union un_lvim *)0xFFFA9).BIT
|
||||
#define LVIS (*(volatile union un_lvis *)0xFFFAA).lvis
|
||||
#define LVIS_bit (*(volatile union un_lvis *)0xFFFAA).BIT
|
||||
#define WDTE (*(volatile unsigned char *)0xFFFAB)
|
||||
#define CRCIN (*(volatile unsigned char *)0xFFFAC)
|
||||
#define DSA0 (*(volatile unsigned char *)0xFFFB0)
|
||||
#define DSA1 (*(volatile unsigned char *)0xFFFB1)
|
||||
#define DRA0 (*(volatile unsigned short *)0xFFFB2)
|
||||
#define DRA0L (*(volatile unsigned char *)0xFFFB2)
|
||||
#define DRA0H (*(volatile unsigned char *)0xFFFB3)
|
||||
#define DRA1 (*(volatile unsigned short *)0xFFFB4)
|
||||
#define DRA1L (*(volatile unsigned char *)0xFFFB4)
|
||||
#define DRA1H (*(volatile unsigned char *)0xFFFB5)
|
||||
#define DBC0 (*(volatile unsigned short *)0xFFFB6)
|
||||
#define DBC0L (*(volatile unsigned char *)0xFFFB6)
|
||||
#define DBC0H (*(volatile unsigned char *)0xFFFB7)
|
||||
#define DBC1 (*(volatile unsigned short *)0xFFFB8)
|
||||
#define DBC1L (*(volatile unsigned char *)0xFFFB8)
|
||||
#define DBC1H (*(volatile unsigned char *)0xFFFB9)
|
||||
#define DMC0 (*(volatile union un_dmc0 *)0xFFFBA).dmc0
|
||||
#define DMC0_bit (*(volatile union un_dmc0 *)0xFFFBA).BIT
|
||||
#define DMC1 (*(volatile union un_dmc1 *)0xFFFBB).dmc1
|
||||
#define DMC1_bit (*(volatile union un_dmc1 *)0xFFFBB).BIT
|
||||
#define DRC0 (*(volatile union un_drc0 *)0xFFFBC).drc0
|
||||
#define DRC0_bit (*(volatile union un_drc0 *)0xFFFBC).BIT
|
||||
#define DRC1 (*(volatile union un_drc1 *)0xFFFBD).drc1
|
||||
#define DRC1_bit (*(volatile union un_drc1 *)0xFFFBD).BIT
|
||||
#define IF0 (*(volatile union un_if0 *)0xFFFE0).if0
|
||||
#define IF0_bit (*(volatile union un_if0 *)0xFFFE0).BIT
|
||||
#define IF0L (*(volatile union un_if0l *)0xFFFE0).if0l
|
||||
#define IF0L_bit (*(volatile union un_if0l *)0xFFFE0).BIT
|
||||
#define IF0H (*(volatile union un_if0h *)0xFFFE1).if0h
|
||||
#define IF0H_bit (*(volatile union un_if0h *)0xFFFE1).BIT
|
||||
#define IF1 (*(volatile union un_if1 *)0xFFFE2).if1
|
||||
#define IF1_bit (*(volatile union un_if1 *)0xFFFE2).BIT
|
||||
#define IF1L (*(volatile union un_if1l *)0xFFFE2).if1l
|
||||
#define IF1L_bit (*(volatile union un_if1l *)0xFFFE2).BIT
|
||||
#define MK0 (*(volatile union un_mk0 *)0xFFFE4).mk0
|
||||
#define MK0_bit (*(volatile union un_mk0 *)0xFFFE4).BIT
|
||||
#define MK0L (*(volatile union un_mk0l *)0xFFFE4).mk0l
|
||||
#define MK0L_bit (*(volatile union un_mk0l *)0xFFFE4).BIT
|
||||
#define MK0H (*(volatile union un_mk0h *)0xFFFE5).mk0h
|
||||
#define MK0H_bit (*(volatile union un_mk0h *)0xFFFE5).BIT
|
||||
#define MK1 (*(volatile union un_mk1 *)0xFFFE6).mk1
|
||||
#define MK1_bit (*(volatile union un_mk1 *)0xFFFE6).BIT
|
||||
#define MK1L (*(volatile union un_mk1l *)0xFFFE6).mk1l
|
||||
#define MK1L_bit (*(volatile union un_mk1l *)0xFFFE6).BIT
|
||||
#define PR00 (*(volatile union un_pr00 *)0xFFFE8).pr00
|
||||
#define PR00_bit (*(volatile union un_pr00 *)0xFFFE8).BIT
|
||||
#define PR00L (*(volatile union un_pr00l *)0xFFFE8).pr00l
|
||||
#define PR00L_bit (*(volatile union un_pr00l *)0xFFFE8).BIT
|
||||
#define PR00H (*(volatile union un_pr00h *)0xFFFE9).pr00h
|
||||
#define PR00H_bit (*(volatile union un_pr00h *)0xFFFE9).BIT
|
||||
#define PR01 (*(volatile union un_pr01 *)0xFFFEA).pr01
|
||||
#define PR01_bit (*(volatile union un_pr01 *)0xFFFEA).BIT
|
||||
#define PR01L (*(volatile union un_pr01l *)0xFFFEA).pr01l
|
||||
#define PR01L_bit (*(volatile union un_pr01l *)0xFFFEA).BIT
|
||||
#define PR10 (*(volatile union un_pr10 *)0xFFFEC).pr10
|
||||
#define PR10_bit (*(volatile union un_pr10 *)0xFFFEC).BIT
|
||||
#define PR10L (*(volatile union un_pr10l *)0xFFFEC).pr10l
|
||||
#define PR10L_bit (*(volatile union un_pr10l *)0xFFFEC).BIT
|
||||
#define PR10H (*(volatile union un_pr10h *)0xFFFED).pr10h
|
||||
#define PR10H_bit (*(volatile union un_pr10h *)0xFFFED).BIT
|
||||
#define PR11 (*(volatile union un_pr11 *)0xFFFEE).pr11
|
||||
#define PR11_bit (*(volatile union un_pr11 *)0xFFFEE).BIT
|
||||
#define PR11L (*(volatile union un_pr11l *)0xFFFEE).pr11l
|
||||
#define PR11L_bit (*(volatile union un_pr11l *)0xFFFEE).BIT
|
||||
#define MDAL (*(volatile unsigned short *)0xFFFF0)
|
||||
#define MULA (*(volatile unsigned short *)0xFFFF0)
|
||||
#define MDAH (*(volatile unsigned short *)0xFFFF2)
|
||||
#define MULB (*(volatile unsigned short *)0xFFFF2)
|
||||
#define MDBH (*(volatile unsigned short *)0xFFFF4)
|
||||
#define MULOH (*(volatile unsigned short *)0xFFFF4)
|
||||
#define MDBL (*(volatile unsigned short *)0xFFFF6)
|
||||
#define MULOL (*(volatile unsigned short *)0xFFFF6)
|
||||
#define PMC (*(volatile union un_pmc *)0xFFFFE).pmc
|
||||
#define PMC_bit (*(volatile union un_pmc *)0xFFFFE).BIT
|
||||
|
||||
/*
|
||||
Sfr bits
|
||||
*/
|
||||
#define ADCE ADM0_bit.no0
|
||||
#define ADCS ADM0_bit.no7
|
||||
#define SPD0 IICS0_bit.no0
|
||||
#define STD0 IICS0_bit.no1
|
||||
#define ACKD0 IICS0_bit.no2
|
||||
#define TRC0 IICS0_bit.no3
|
||||
#define COI0 IICS0_bit.no4
|
||||
#define EXC0 IICS0_bit.no5
|
||||
#define ALD0 IICS0_bit.no6
|
||||
#define MSTS0 IICS0_bit.no7
|
||||
#define IICRSV0 IICF0_bit.no0
|
||||
#define STCEN0 IICF0_bit.no1
|
||||
#define IICBSY0 IICF0_bit.no6
|
||||
#define STCF0 IICF0_bit.no7
|
||||
#define HIOSTOP CSC_bit.no0
|
||||
#define MSTOP CSC_bit.no7
|
||||
#define MCM0 CKC_bit.no4
|
||||
#define MCS CKC_bit.no5
|
||||
#define PCLOE0 CKS0_bit.no7
|
||||
#define LVIF LVIM_bit.no0
|
||||
#define LVIOMSK LVIM_bit.no1
|
||||
#define LVISEN LVIM_bit.no7
|
||||
#define LVILV LVIS_bit.no0
|
||||
#define LVIMD LVIS_bit.no7
|
||||
#define DWAIT0 DMC0_bit.no4
|
||||
#define DS0 DMC0_bit.no5
|
||||
#define DRS0 DMC0_bit.no6
|
||||
#define STG0 DMC0_bit.no7
|
||||
#define DWAIT1 DMC1_bit.no4
|
||||
#define DS1 DMC1_bit.no5
|
||||
#define DRS1 DMC1_bit.no6
|
||||
#define STG1 DMC1_bit.no7
|
||||
#define DST0 DRC0_bit.no0
|
||||
#define DEN0 DRC0_bit.no7
|
||||
#define DST1 DRC1_bit.no0
|
||||
#define DEN1 DRC1_bit.no7
|
||||
#define WDTIIF IF0L_bit.no0
|
||||
#define LVIIF IF0L_bit.no1
|
||||
#define PIF0 IF0L_bit.no2
|
||||
#define PIF1 IF0L_bit.no3
|
||||
#define PIF2 IF0L_bit.no4
|
||||
#define PIF3 IF0L_bit.no5
|
||||
#define DMAIF0 IF0L_bit.no6
|
||||
#define DMAIF1 IF0L_bit.no7
|
||||
#define CSIIF00 IF0H_bit.no0
|
||||
#define IICIF00 IF0H_bit.no0
|
||||
#define STIF0 IF0H_bit.no0
|
||||
#define CSIIF01 IF0H_bit.no1
|
||||
#define IICIF01 IF0H_bit.no1
|
||||
#define SRIF0 IF0H_bit.no1
|
||||
#define SREIF0 IF0H_bit.no2
|
||||
#define TMIF01H IF0H_bit.no3
|
||||
#define TMIF03H IF0H_bit.no4
|
||||
#define IICAIF0 IF0H_bit.no5
|
||||
#define TMIF00 IF0H_bit.no6
|
||||
#define TMIF01 IF0H_bit.no7
|
||||
#define TMIF02 IF1L_bit.no0
|
||||
#define TMIF03 IF1L_bit.no1
|
||||
#define ADIF IF1L_bit.no2
|
||||
#define TMKAIF IF1L_bit.no3
|
||||
#define KRIF IF1L_bit.no4
|
||||
#define MDIF IF1L_bit.no5
|
||||
#define FLIF IF1L_bit.no6
|
||||
#define WDTIMK MK0L_bit.no0
|
||||
#define LVIMK MK0L_bit.no1
|
||||
#define PMK0 MK0L_bit.no2
|
||||
#define PMK1 MK0L_bit.no3
|
||||
#define PMK2 MK0L_bit.no4
|
||||
#define PMK3 MK0L_bit.no5
|
||||
#define DMAMK0 MK0L_bit.no6
|
||||
#define DMAMK1 MK0L_bit.no7
|
||||
#define CSIMK00 MK0H_bit.no0
|
||||
#define IICMK00 MK0H_bit.no0
|
||||
#define STMK0 MK0H_bit.no0
|
||||
#define CSIMK01 MK0H_bit.no1
|
||||
#define IICMK01 MK0H_bit.no1
|
||||
#define SRMK0 MK0H_bit.no1
|
||||
#define SREMK0 MK0H_bit.no2
|
||||
#define TMMK01H MK0H_bit.no3
|
||||
#define TMMK03H MK0H_bit.no4
|
||||
#define IICAMK0 MK0H_bit.no5
|
||||
#define TMMK00 MK0H_bit.no6
|
||||
#define TMMK01 MK0H_bit.no7
|
||||
#define TMMK02 MK1L_bit.no0
|
||||
#define TMMK03 MK1L_bit.no1
|
||||
#define ADMK MK1L_bit.no2
|
||||
#define TMKAMK MK1L_bit.no3
|
||||
#define KRMK MK1L_bit.no4
|
||||
#define MDMK MK1L_bit.no5
|
||||
#define FLMK MK1L_bit.no6
|
||||
#define WDTIPR0 PR00L_bit.no0
|
||||
#define LVIPR0 PR00L_bit.no1
|
||||
#define PPR00 PR00L_bit.no2
|
||||
#define PPR01 PR00L_bit.no3
|
||||
#define PPR02 PR00L_bit.no4
|
||||
#define PPR03 PR00L_bit.no5
|
||||
#define DMAPR00 PR00L_bit.no6
|
||||
#define DMAPR01 PR00L_bit.no7
|
||||
#define CSIPR000 PR00H_bit.no0
|
||||
#define IICPR000 PR00H_bit.no0
|
||||
#define STPR00 PR00H_bit.no0
|
||||
#define CSIPR001 PR00H_bit.no1
|
||||
#define IICPR001 PR00H_bit.no1
|
||||
#define SRPR00 PR00H_bit.no1
|
||||
#define SREPR00 PR00H_bit.no2
|
||||
#define TMPR001H PR00H_bit.no3
|
||||
#define TMPR003H PR00H_bit.no4
|
||||
#define IICAPR00 PR00H_bit.no5
|
||||
#define TMPR000 PR00H_bit.no6
|
||||
#define TMPR001 PR00H_bit.no7
|
||||
#define TMPR002 PR01L_bit.no0
|
||||
#define TMPR003 PR01L_bit.no1
|
||||
#define ADPR0 PR01L_bit.no2
|
||||
#define TMKAPR0 PR01L_bit.no3
|
||||
#define KRPR0 PR01L_bit.no4
|
||||
#define MDPR0 PR01L_bit.no5
|
||||
#define FLPR0 PR01L_bit.no6
|
||||
#define WDTIPR1 PR10L_bit.no0
|
||||
#define LVIPR1 PR10L_bit.no1
|
||||
#define PPR10 PR10L_bit.no2
|
||||
#define PPR11 PR10L_bit.no3
|
||||
#define PPR12 PR10L_bit.no4
|
||||
#define PPR13 PR10L_bit.no5
|
||||
#define DMAPR10 PR10L_bit.no6
|
||||
#define DMAPR11 PR10L_bit.no7
|
||||
#define CSIPR100 PR10H_bit.no0
|
||||
#define IICPR100 PR10H_bit.no0
|
||||
#define STPR10 PR10H_bit.no0
|
||||
#define CSIPR101 PR10H_bit.no1
|
||||
#define IICPR101 PR10H_bit.no1
|
||||
#define SRPR10 PR10H_bit.no1
|
||||
#define SREPR10 PR10H_bit.no2
|
||||
#define TMPR101H PR10H_bit.no3
|
||||
#define TMPR103H PR10H_bit.no4
|
||||
#define IICAPR10 PR10H_bit.no5
|
||||
#define TMPR100 PR10H_bit.no6
|
||||
#define TMPR101 PR10H_bit.no7
|
||||
#define TMPR102 PR11L_bit.no0
|
||||
#define TMPR103 PR11L_bit.no1
|
||||
#define ADPR1 PR11L_bit.no2
|
||||
#define TMKAPR1 PR11L_bit.no3
|
||||
#define KRPR1 PR11L_bit.no4
|
||||
#define MDPR1 PR11L_bit.no5
|
||||
#define FLPR1 PR11L_bit.no6
|
||||
#define MAA PMC_bit.no0
|
||||
|
||||
/*
|
||||
Interrupt vector addresses
|
||||
*/
|
||||
#define RST_vect 0x0
|
||||
#define INTDBG_vect 0x2
|
||||
#define INTWDTI_vect 0x4
|
||||
#define INTLVI_vect 0x6
|
||||
#define INTP0_vect 0x8
|
||||
#define INTP1_vect 0xA
|
||||
#define INTP2_vect 0xC
|
||||
#define INTP3_vect 0xE
|
||||
#define INTDMA0_vect 0x10
|
||||
#define INTDMA1_vect 0x12
|
||||
#define INTCSI00_vect 0x14
|
||||
#define INTIIC00_vect 0x14
|
||||
#define INTST0_vect 0x14
|
||||
#define INTCSI01_vect 0x16
|
||||
#define INTIIC01_vect 0x16
|
||||
#define INTSR0_vect 0x16
|
||||
#define INTSRE0_vect 0x18
|
||||
#define INTTM01H_vect 0x1A
|
||||
#define INTTM03H_vect 0x1C
|
||||
#define INTIICA0_vect 0x1E
|
||||
#define INTTM00_vect 0x20
|
||||
#define INTTM01_vect 0x22
|
||||
#define INTTM02_vect 0x24
|
||||
#define INTTM03_vect 0x26
|
||||
#define INTAD_vect 0x28
|
||||
#define INTIT_vect 0x2A
|
||||
#define INTKR_vect 0x2C
|
||||
#define INTMD_vect 0x2E
|
||||
#define INTFL_vect 0x30
|
||||
#define BRK_I_vect 0x7E
|
||||
#endif
|
||||
@@ -0,0 +1,335 @@
|
||||
/************************************************************************/
|
||||
/* Header file generated from device file: */
|
||||
/* DR5F1026A.DVF */
|
||||
/* V1.12 (2012/04/03) */
|
||||
/* Copyright(C) 2012 Renesas */
|
||||
/* Tool Version: 4.0.0 */
|
||||
/* Date Generated: 2020/01/17 */
|
||||
/************************************************************************/
|
||||
|
||||
#ifndef __INTRINSIC_FUNCTIONS
|
||||
#define __INTRINSIC_FUNCTIONS
|
||||
|
||||
#define DI() asm("di")
|
||||
#define EI() asm("ei")
|
||||
#define HALT() asm("halt")
|
||||
#define NOP() asm("nop")
|
||||
#define STOP() asm("stop")
|
||||
|
||||
#endif
|
||||
|
||||
#ifndef __IOREG_BIT_STRUCTURES
|
||||
#define __IOREG_BIT_STRUCTURES
|
||||
typedef struct {
|
||||
unsigned char no0 :1;
|
||||
unsigned char no1 :1;
|
||||
unsigned char no2 :1;
|
||||
unsigned char no3 :1;
|
||||
unsigned char no4 :1;
|
||||
unsigned char no5 :1;
|
||||
unsigned char no6 :1;
|
||||
unsigned char no7 :1;
|
||||
} __BITS8;
|
||||
|
||||
typedef struct {
|
||||
unsigned short no0 :1;
|
||||
unsigned short no1 :1;
|
||||
unsigned short no2 :1;
|
||||
unsigned short no3 :1;
|
||||
unsigned short no4 :1;
|
||||
unsigned short no5 :1;
|
||||
unsigned short no6 :1;
|
||||
unsigned short no7 :1;
|
||||
unsigned short no8 :1;
|
||||
unsigned short no9 :1;
|
||||
unsigned short no10 :1;
|
||||
unsigned short no11 :1;
|
||||
unsigned short no12 :1;
|
||||
unsigned short no13 :1;
|
||||
unsigned short no14 :1;
|
||||
unsigned short no15 :1;
|
||||
} __BITS16;
|
||||
|
||||
#endif
|
||||
|
||||
#ifndef IODEFINE_EXT_H
|
||||
#define IODEFINE_EXT_H
|
||||
|
||||
/*
|
||||
IO Registers
|
||||
*/
|
||||
union un_adm2 {
|
||||
unsigned char adm2;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_pu1 {
|
||||
unsigned char pu1;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_pu4 {
|
||||
unsigned char pu4;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_pu12 {
|
||||
unsigned char pu12;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_pim1 {
|
||||
unsigned char pim1;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_pom1 {
|
||||
unsigned char pom1;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_pom4 {
|
||||
unsigned char pom4;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_pmc1 {
|
||||
unsigned char pmc1;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_pmc4 {
|
||||
unsigned char pmc4;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_nfen0 {
|
||||
unsigned char nfen0;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_nfen1 {
|
||||
unsigned char nfen1;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_isc {
|
||||
unsigned char isc;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_dflctl {
|
||||
unsigned char dflctl;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_mduc {
|
||||
unsigned char mduc;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_per0 {
|
||||
unsigned char per0;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_rmc {
|
||||
unsigned char rmc;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_rpectl {
|
||||
unsigned char rpectl;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_se0l {
|
||||
unsigned char se0l;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_ss0l {
|
||||
unsigned char ss0l;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_st0l {
|
||||
unsigned char st0l;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_soe0l {
|
||||
unsigned char soe0l;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_te0l {
|
||||
unsigned char te0l;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_ts0l {
|
||||
unsigned char ts0l;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_tt0l {
|
||||
unsigned char tt0l;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_toe0l {
|
||||
unsigned char toe0l;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_iicctl00 {
|
||||
unsigned char iicctl00;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_iicctl01 {
|
||||
unsigned char iicctl01;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
|
||||
#define ADM2 (*(volatile union un_adm2 *)0xF0010).adm2
|
||||
#define ADM2_bit (*(volatile union un_adm2 *)0xF0010).BIT
|
||||
#define ADUL (*(volatile unsigned char *)0xF0011)
|
||||
#define ADLL (*(volatile unsigned char *)0xF0012)
|
||||
#define ADTES (*(volatile unsigned char *)0xF0013)
|
||||
#define PU1 (*(volatile union un_pu1 *)0xF0031).pu1
|
||||
#define PU1_bit (*(volatile union un_pu1 *)0xF0031).BIT
|
||||
#define PU4 (*(volatile union un_pu4 *)0xF0034).pu4
|
||||
#define PU4_bit (*(volatile union un_pu4 *)0xF0034).BIT
|
||||
#define PU12 (*(volatile union un_pu12 *)0xF003C).pu12
|
||||
#define PU12_bit (*(volatile union un_pu12 *)0xF003C).BIT
|
||||
#define PIM1 (*(volatile union un_pim1 *)0xF0041).pim1
|
||||
#define PIM1_bit (*(volatile union un_pim1 *)0xF0041).BIT
|
||||
#define POM1 (*(volatile union un_pom1 *)0xF0051).pom1
|
||||
#define POM1_bit (*(volatile union un_pom1 *)0xF0051).BIT
|
||||
#define POM4 (*(volatile union un_pom4 *)0xF0054).pom4
|
||||
#define POM4_bit (*(volatile union un_pom4 *)0xF0054).BIT
|
||||
#define PMC1 (*(volatile union un_pmc1 *)0xF0061).pmc1
|
||||
#define PMC1_bit (*(volatile union un_pmc1 *)0xF0061).BIT
|
||||
#define PMC4 (*(volatile union un_pmc4 *)0xF0064).pmc4
|
||||
#define PMC4_bit (*(volatile union un_pmc4 *)0xF0064).BIT
|
||||
#define NFEN0 (*(volatile union un_nfen0 *)0xF0070).nfen0
|
||||
#define NFEN0_bit (*(volatile union un_nfen0 *)0xF0070).BIT
|
||||
#define NFEN1 (*(volatile union un_nfen1 *)0xF0071).nfen1
|
||||
#define NFEN1_bit (*(volatile union un_nfen1 *)0xF0071).BIT
|
||||
#define ISC (*(volatile union un_isc *)0xF0073).isc
|
||||
#define ISC_bit (*(volatile union un_isc *)0xF0073).BIT
|
||||
#define TIS0 (*(volatile unsigned char *)0xF0074)
|
||||
#define ADPC (*(volatile unsigned char *)0xF0076)
|
||||
#define PIOR (*(volatile unsigned char *)0xF0077)
|
||||
#define IAWCTL (*(volatile unsigned char *)0xF0078)
|
||||
#define DFLCTL (*(volatile union un_dflctl *)0xF0090).dflctl
|
||||
#define DFLCTL_bit (*(volatile union un_dflctl *)0xF0090).BIT
|
||||
#define HIOTRM (*(volatile unsigned char *)0xF00A0)
|
||||
#define HOCODIV (*(volatile unsigned char *)0xF00A8)
|
||||
#define TEMPCAL0 (*(volatile unsigned char *)0xF00AC)
|
||||
#define TEMPCAL1 (*(volatile unsigned char *)0xF00AD)
|
||||
#define TEMPCAL2 (*(volatile unsigned char *)0xF00AE)
|
||||
#define TEMPCAL3 (*(volatile unsigned char *)0xF00AF)
|
||||
#define MDCL (*(volatile unsigned short *)0xF00E0)
|
||||
#define MDCH (*(volatile unsigned short *)0xF00E2)
|
||||
#define MDUC (*(volatile union un_mduc *)0xF00E8).mduc
|
||||
#define MDUC_bit (*(volatile union un_mduc *)0xF00E8).BIT
|
||||
#define PER0 (*(volatile union un_per0 *)0xF00F0).per0
|
||||
#define PER0_bit (*(volatile union un_per0 *)0xF00F0).BIT
|
||||
#define OSMC (*(volatile unsigned char *)0xF00F3)
|
||||
#define RMC (*(volatile union un_rmc *)0xF00F4).rmc
|
||||
#define RMC_bit (*(volatile union un_rmc *)0xF00F4).BIT
|
||||
#define RPECTL (*(volatile union un_rpectl *)0xF00F5).rpectl
|
||||
#define RPECTL_bit (*(volatile union un_rpectl *)0xF00F5).BIT
|
||||
#define BCDADJ (*(volatile unsigned char *)0xF00FE)
|
||||
#define SSR00 (*(volatile unsigned short *)0xF0100)
|
||||
#define SSR00L (*(volatile unsigned char *)0xF0100)
|
||||
#define SSR01 (*(volatile unsigned short *)0xF0102)
|
||||
#define SSR01L (*(volatile unsigned char *)0xF0102)
|
||||
#define SIR00 (*(volatile unsigned short *)0xF0108)
|
||||
#define SIR00L (*(volatile unsigned char *)0xF0108)
|
||||
#define SIR01 (*(volatile unsigned short *)0xF010A)
|
||||
#define SIR01L (*(volatile unsigned char *)0xF010A)
|
||||
#define SMR00 (*(volatile unsigned short *)0xF0110)
|
||||
#define SMR01 (*(volatile unsigned short *)0xF0112)
|
||||
#define SCR00 (*(volatile unsigned short *)0xF0118)
|
||||
#define SCR01 (*(volatile unsigned short *)0xF011A)
|
||||
#define SE0 (*(volatile unsigned short *)0xF0120)
|
||||
#define SE0L (*(volatile union un_se0l *)0xF0120).se0l
|
||||
#define SE0L_bit (*(volatile union un_se0l *)0xF0120).BIT
|
||||
#define SS0 (*(volatile unsigned short *)0xF0122)
|
||||
#define SS0L (*(volatile union un_ss0l *)0xF0122).ss0l
|
||||
#define SS0L_bit (*(volatile union un_ss0l *)0xF0122).BIT
|
||||
#define ST0 (*(volatile unsigned short *)0xF0124)
|
||||
#define ST0L (*(volatile union un_st0l *)0xF0124).st0l
|
||||
#define ST0L_bit (*(volatile union un_st0l *)0xF0124).BIT
|
||||
#define SPS0 (*(volatile unsigned short *)0xF0126)
|
||||
#define SPS0L (*(volatile unsigned char *)0xF0126)
|
||||
#define SO0 (*(volatile unsigned short *)0xF0128)
|
||||
#define SOE0 (*(volatile unsigned short *)0xF012A)
|
||||
#define SOE0L (*(volatile union un_soe0l *)0xF012A).soe0l
|
||||
#define SOE0L_bit (*(volatile union un_soe0l *)0xF012A).BIT
|
||||
#define SOL0 (*(volatile unsigned short *)0xF0134)
|
||||
#define SOL0L (*(volatile unsigned char *)0xF0134)
|
||||
#define SSC0 (*(volatile unsigned short *)0xF0138)
|
||||
#define SSC0L (*(volatile unsigned char *)0xF0138)
|
||||
#define TCR00 (*(volatile unsigned short *)0xF0180)
|
||||
#define TCR01 (*(volatile unsigned short *)0xF0182)
|
||||
#define TCR02 (*(volatile unsigned short *)0xF0184)
|
||||
#define TCR03 (*(volatile unsigned short *)0xF0186)
|
||||
#define TMR00 (*(volatile unsigned short *)0xF0190)
|
||||
#define TMR01 (*(volatile unsigned short *)0xF0192)
|
||||
#define TMR02 (*(volatile unsigned short *)0xF0194)
|
||||
#define TMR03 (*(volatile unsigned short *)0xF0196)
|
||||
#define TSR00 (*(volatile unsigned short *)0xF01A0)
|
||||
#define TSR00L (*(volatile unsigned char *)0xF01A0)
|
||||
#define TSR01 (*(volatile unsigned short *)0xF01A2)
|
||||
#define TSR01L (*(volatile unsigned char *)0xF01A2)
|
||||
#define TSR02 (*(volatile unsigned short *)0xF01A4)
|
||||
#define TSR02L (*(volatile unsigned char *)0xF01A4)
|
||||
#define TSR03 (*(volatile unsigned short *)0xF01A6)
|
||||
#define TSR03L (*(volatile unsigned char *)0xF01A6)
|
||||
#define TE0 (*(volatile unsigned short *)0xF01B0)
|
||||
#define TE0L (*(volatile union un_te0l *)0xF01B0).te0l
|
||||
#define TE0L_bit (*(volatile union un_te0l *)0xF01B0).BIT
|
||||
#define TS0 (*(volatile unsigned short *)0xF01B2)
|
||||
#define TS0L (*(volatile union un_ts0l *)0xF01B2).ts0l
|
||||
#define TS0L_bit (*(volatile union un_ts0l *)0xF01B2).BIT
|
||||
#define TT0 (*(volatile unsigned short *)0xF01B4)
|
||||
#define TT0L (*(volatile union un_tt0l *)0xF01B4).tt0l
|
||||
#define TT0L_bit (*(volatile union un_tt0l *)0xF01B4).BIT
|
||||
#define TPS0 (*(volatile unsigned short *)0xF01B6)
|
||||
#define TO0 (*(volatile unsigned short *)0xF01B8)
|
||||
#define TO0L (*(volatile unsigned char *)0xF01B8)
|
||||
#define TOE0 (*(volatile unsigned short *)0xF01BA)
|
||||
#define TOE0L (*(volatile union un_toe0l *)0xF01BA).toe0l
|
||||
#define TOE0L_bit (*(volatile union un_toe0l *)0xF01BA).BIT
|
||||
#define TOL0 (*(volatile unsigned short *)0xF01BC)
|
||||
#define TOL0L (*(volatile unsigned char *)0xF01BC)
|
||||
#define TOM0 (*(volatile unsigned short *)0xF01BE)
|
||||
#define TOM0L (*(volatile unsigned char *)0xF01BE)
|
||||
#define IICCTL00 (*(volatile union un_iicctl00 *)0xF0230).iicctl00
|
||||
#define IICCTL00_bit (*(volatile union un_iicctl00 *)0xF0230).BIT
|
||||
#define IICCTL01 (*(volatile union un_iicctl01 *)0xF0231).iicctl01
|
||||
#define IICCTL01_bit (*(volatile union un_iicctl01 *)0xF0231).BIT
|
||||
#define IICWL0 (*(volatile unsigned char *)0xF0232)
|
||||
#define IICWH0 (*(volatile unsigned char *)0xF0233)
|
||||
#define SVA0 (*(volatile unsigned char *)0xF0234)
|
||||
#define CRCD (*(volatile unsigned short *)0xF02FA)
|
||||
|
||||
/*
|
||||
Sfr bits
|
||||
*/
|
||||
#define ADTYP ADM2_bit.no0
|
||||
#define AWC ADM2_bit.no2
|
||||
#define ADRCK ADM2_bit.no3
|
||||
#define DFLEN DFLCTL_bit.no0
|
||||
#define DIVST MDUC_bit.no0
|
||||
#define MACSF MDUC_bit.no1
|
||||
#define MACOF MDUC_bit.no2
|
||||
#define MDSM MDUC_bit.no3
|
||||
#define MACMODE MDUC_bit.no6
|
||||
#define DIVMODE MDUC_bit.no7
|
||||
#define TAU0EN PER0_bit.no0
|
||||
#define SAU0EN PER0_bit.no2
|
||||
#define IICA0EN PER0_bit.no4
|
||||
#define ADCEN PER0_bit.no5
|
||||
#define TMKAEN PER0_bit.no7
|
||||
#define WDVOL RMC_bit.no7
|
||||
#define RPEF RPECTL_bit.no0
|
||||
#define RPERDIS RPECTL_bit.no7
|
||||
#define SPT0 IICCTL00_bit.no0
|
||||
#define STT0 IICCTL00_bit.no1
|
||||
#define ACKE0 IICCTL00_bit.no2
|
||||
#define WTIM0 IICCTL00_bit.no3
|
||||
#define SPIE0 IICCTL00_bit.no4
|
||||
#define WREL0 IICCTL00_bit.no5
|
||||
#define LREL0 IICCTL00_bit.no6
|
||||
#define IICE0 IICCTL00_bit.no7
|
||||
#define PRS0 IICCTL01_bit.no0
|
||||
#define DFC0 IICCTL01_bit.no2
|
||||
#define SMC0 IICCTL01_bit.no3
|
||||
#define DAD0 IICCTL01_bit.no4
|
||||
#define CLD0 IICCTL01_bit.no5
|
||||
#define WUP0 IICCTL01_bit.no7
|
||||
|
||||
/*
|
||||
Interrupt vector addresses
|
||||
*/
|
||||
#endif
|
||||
@@ -0,0 +1,265 @@
|
||||
MEMORY
|
||||
{
|
||||
VEC : ORIGIN = 0x00, LENGTH = 0x04 /* 0x00000 - 0x00003 */
|
||||
IVEC : ORIGIN = 0x04, LENGTH = 0x80 - 0x04 /* 0x00004 - 0x0007F */
|
||||
CALLT0 : ORIGIN = 0x80, LENGTH = 0x40 /* 0x00080 = 0x000BF */
|
||||
OPT : ORIGIN = 0xC0, LENGTH = 0x04 /* 0x000C0 - 0x000C3 */
|
||||
SEC_ID : ORIGIN = 0xC4, LENGTH = 0x0A /* 0x000C4 - 0x000CD */
|
||||
|
||||
OCDSTAD : ORIGIN = 0xCE, LENGTH = 0xA0 /* 0x000CE - 0x000D7 CA78K0R on chip debugging */
|
||||
OCDROM : ORIGIN = 0x3E00, LENGTH = 0x200 /* 0x03E00 - 0x03FFF CA78K0R on chip debugging */
|
||||
|
||||
ROM : ORIGIN = 0xD8, LENGTH = 0x3E00 -0xD8 /* 0x000D8 - 0x03DFF */
|
||||
|
||||
MIRROR : ORIGIN = 0xF2000, LENGTH = 0x2000 /* 0xF2000 - 0xF3FFF */
|
||||
SADDR : ORIGIN = 0xFFE20, LENGTH = 0x0100 /* 0xFFE20 - 0xFFF1F */
|
||||
SELFRAM : ORIGIN = 0xFF900, LENGTH = 136
|
||||
RAM : ORIGIN = 0xFF988, LENGTH = 0xFFE20 -0xFF988 /* 0xFF988 - 0xFFE1F */
|
||||
}
|
||||
|
||||
EXTERN(_Option_Bytes _Security_Id _Debug_Monitor _HardwareVectors _Vectors)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.vec 0x0: AT(0x0)
|
||||
{
|
||||
KEEP(*(.vec))
|
||||
} > VEC
|
||||
.vects 0x4: AT(0x4)
|
||||
{
|
||||
KEEP(*(.vects))
|
||||
} > IVEC
|
||||
|
||||
.callt0 0x80 : AT(0x80)
|
||||
{
|
||||
. = ALIGN(2);
|
||||
KEEP(*(.callt0))
|
||||
} > CALLT0
|
||||
|
||||
.option_byte 0xC0 : AT(0xC0)
|
||||
{
|
||||
KEEP(*(.option_bytes))
|
||||
} > OPT
|
||||
|
||||
.security_id 0xC4: AT(0xC4)
|
||||
{
|
||||
KEEP(*(.security_id))
|
||||
} > SEC_ID
|
||||
|
||||
.debug_monitor 0xCE : AT(0xCE)
|
||||
{
|
||||
KEEP(*(.debug_monitor))
|
||||
} > OCDSTAD
|
||||
|
||||
.lowtext 0xD8: AT(0xD8)
|
||||
{
|
||||
*(.plt)
|
||||
*(.lowtext)
|
||||
} > ROM
|
||||
|
||||
__mdata = .;
|
||||
|
||||
.init :
|
||||
{
|
||||
KEEP(*(.init))
|
||||
} > ROM
|
||||
|
||||
.fini :
|
||||
{
|
||||
KEEP(*(.fini))
|
||||
} > ROM
|
||||
|
||||
PROVIDE(__rodata_limit = CONSTANT(MIRRORAREASTART)+0x2000 + LENGTH(MIRROR));
|
||||
|
||||
/* The rodata section is placed in MIRROR area in order to access as near addressing. */
|
||||
.rodata MAX(., (CONSTANT(MIRRORAREASTART)+0x2000)):
|
||||
{
|
||||
. = ALIGN(2);
|
||||
__rodata = .;
|
||||
*(.rodata)
|
||||
*(.rodata.*)
|
||||
. = ALIGN(2);
|
||||
*(.const)
|
||||
*(.const.*)
|
||||
|
||||
. = ALIGN(2);
|
||||
PROVIDE(__init_array_start = .);
|
||||
KEEP(*(SORT(.init_array.*)))
|
||||
KEEP(*(.init_array))
|
||||
PROVIDE(__init_array_end = .);
|
||||
PROVIDE(__fini_array_start = .);
|
||||
KEEP(*(.fini_array))
|
||||
KEEP(*(SORT(.fini_array.*)))
|
||||
PROVIDE(__fini_array_end = .);
|
||||
__erodata = .;
|
||||
/*The rodata section is copied into the MIRROR area, that is why we check if the start and end addresses for rodata are less then _rodata_limit*/
|
||||
ASSERT((SIZEOF (.rodata) == 0) || (__rodata < __rodata_limit), "Error: rodata section start address is too large. Move the text section after the rodata section to ensure that correct data is added to the MIRROR area.");
|
||||
ASSERT((SIZEOF (.rodata) == 0) || (__erodata <= __rodata_limit), "Error: rodata section size exceeds length of the MIRROR area.");
|
||||
|
||||
}>ROM
|
||||
|
||||
.text (. + __romdatacopysize) :
|
||||
{
|
||||
. = ALIGN(2);
|
||||
*(mfdl)
|
||||
|
||||
. = ALIGN(2);
|
||||
*(PFDL_COD)
|
||||
*(PFDL_COD.*)
|
||||
|
||||
. = ALIGN(2);
|
||||
*(.text)
|
||||
*(.text.*)
|
||||
/*INPUT_SECTION_FLAGS(SHF_EXECINSTR) *(*_n)*/
|
||||
} >ROM AT>ROM
|
||||
|
||||
.textf :
|
||||
{
|
||||
*(.textf)
|
||||
*(.textf.*)
|
||||
/*INPUT_SECTION_FLAGS(SHF_EXECINSTR) *(*_f)*/
|
||||
}>ROM
|
||||
|
||||
.frodata :
|
||||
{
|
||||
. = ALIGN(2);
|
||||
__frodata = .;
|
||||
*(.frodata)
|
||||
*(.frodata.*)
|
||||
__efrodata = .;
|
||||
|
||||
. = ALIGN(2);
|
||||
__constf = .;
|
||||
*(.constf)
|
||||
*(.constf.*)
|
||||
__econstf = .;
|
||||
} >ROM
|
||||
|
||||
.eh_frame_hdr :
|
||||
{
|
||||
KEEP(*(.eh_frame_hdr))
|
||||
} > ROM
|
||||
.eh_frame :
|
||||
{
|
||||
KEEP(*(.eh_frame))
|
||||
} > ROM
|
||||
|
||||
.data 0xFFC8A : AT(__mdata)
|
||||
{
|
||||
. = ALIGN(2);
|
||||
PROVIDE (__datastart = .);
|
||||
__data = .;
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
. = ALIGN(2);
|
||||
/*INPUT_SECTION_FLAGS(!SHF_EXECINSTR, SHF_WRITE, SHF_ALLOC) *(*_n)*/
|
||||
__edata = .;
|
||||
} >RAM
|
||||
|
||||
|
||||
PROVIDE(__romdatastart = LOADADDR(.data));
|
||||
PROVIDE (__romdatacopysize = SIZEOF(.data));
|
||||
|
||||
|
||||
.dataf : {
|
||||
. = ALIGN(2);
|
||||
PROVIDE (__datafstart = .);
|
||||
. = ALIGN(2);
|
||||
*(.dataf)
|
||||
*(.dataf.*)
|
||||
/*INPUT_SECTION_FLAGS(!SHF_EXECINSTR, SHF_WRITE, SHF_ALLOC) *(*_f)*/
|
||||
. = ALIGN(2);
|
||||
PROVIDE (__datafend = .);
|
||||
} > RAM AT> ROM
|
||||
PROVIDE(__romdatafstart = LOADADDR(.dataf));
|
||||
PROVIDE (__romdatafcopysize = SIZEOF(.dataf));
|
||||
|
||||
|
||||
.sdata : {
|
||||
. = ALIGN(2);
|
||||
PROVIDE (__sdatastart = .);
|
||||
*(.sdata)
|
||||
*(.sdata.*)
|
||||
. = ALIGN(2);
|
||||
PROVIDE (__sdataend = .);
|
||||
} > SADDR AT> ROM
|
||||
|
||||
/* Note that crt0 assumes this is a multiple of two; all the
|
||||
start/stop symbols are also assumed word-aligned. */
|
||||
PROVIDE(__romsdatastart = LOADADDR(.sdata));
|
||||
PROVIDE (__romsdatacopysize = SIZEOF(.sdata));
|
||||
|
||||
|
||||
.saddr : {
|
||||
|
||||
. = ALIGN(2);
|
||||
PROVIDE (__saddrstart = .);
|
||||
*(.saddr)
|
||||
. = ALIGN(2);
|
||||
|
||||
} >SADDR AT>ROM
|
||||
PROVIDE(__romsaddrstart = LOADADDR(.saddr));
|
||||
PROVIDE (__romsaddrcopysize = SIZEOF(.saddr));
|
||||
|
||||
|
||||
|
||||
.sbss :
|
||||
{
|
||||
PROVIDE(__sbssstart = .);
|
||||
. = ALIGN(2);
|
||||
__sbss = .;
|
||||
*(.sbss)
|
||||
*(.sbss.*)
|
||||
/*INPUT_SECTION_FLAGS(!SHF_EXECINSTR, SHF_WRITE, SHF_ALLOC) *(*_s)*/
|
||||
. = ALIGN(2);
|
||||
*(.sbss_bit)
|
||||
. = ALIGN(2);
|
||||
__esbss = .;
|
||||
|
||||
} >SADDR AT>SADDR
|
||||
PROVIDE(__sbsssize = SIZEOF(.sbss));
|
||||
|
||||
.bss :
|
||||
{
|
||||
PROVIDE(__bssstart = .);
|
||||
. = ALIGN(2);
|
||||
__bss = .;
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
. = ALIGN(2);
|
||||
*(.bss_bit)
|
||||
. = ALIGN(2);
|
||||
*(COMMON)
|
||||
. = ALIGN(2);
|
||||
__ebss = .;
|
||||
} >RAM AT>RAM
|
||||
PROVIDE(__bsssize = SIZEOF(.bss));
|
||||
|
||||
|
||||
.bssf (NOLOAD):
|
||||
{
|
||||
PROVIDE(__bssfstart = .);
|
||||
. = ALIGN(2);
|
||||
*(.bssf)
|
||||
*(.bssf.*)
|
||||
/*INPUT_SECTION_FLAGS(!SHF_EXECINSTR, SHF_WRITE, SHF_ALLOC) *(*_f)*/
|
||||
. = ALIGN(128);
|
||||
__end = .;
|
||||
} >RAM AT>RAM
|
||||
PROVIDE(__bssfsize = SIZEOF(.bssf));
|
||||
|
||||
PROVIDE(__stack_size = 0x64);
|
||||
.stack 0xFFE20 (NOLOAD) : AT(0xFFE20)
|
||||
{
|
||||
|
||||
PROVIDE(__stack = .);
|
||||
ASSERT((__stack > (__end + __stack_size)), "Error: Too much data - no room left for the stack");
|
||||
} >RAM
|
||||
|
||||
/DISCARD/ :
|
||||
{
|
||||
*(.note)
|
||||
*(.note.*)
|
||||
*(.gnu.warning*)
|
||||
}
|
||||
}
|
||||
@@ -0,0 +1,254 @@
|
||||
/************************************************************************/
|
||||
/* File Version: V1.10d */
|
||||
/* Date Generated: 03/17/2025 */
|
||||
/************************************************************************/
|
||||
|
||||
/*reset_program.asm*/
|
||||
|
||||
#ifdef CPPAPP
|
||||
___dso_handle:
|
||||
.global ___dso_handle
|
||||
#endif
|
||||
|
||||
#if __clang_major__ <= 10
|
||||
;; If you are using LLVM RL V10.0.0.202301 to V10.0.0.202312, please comment out the following three lines.
|
||||
#define HIGHW(x) %hi16(x)
|
||||
#define LOWW(x) x
|
||||
#define LOW(x) x
|
||||
#endif
|
||||
|
||||
.extern _HardwareSetup /*! external Sub-routine to initialise Hardware*/
|
||||
.extern __data
|
||||
.extern __mdata
|
||||
.extern __ebss
|
||||
.extern __bss
|
||||
.extern __edata
|
||||
.extern _main
|
||||
.extern __stack
|
||||
|
||||
.text
|
||||
|
||||
.global _PowerON_Reset /*! global Start routine */
|
||||
.type _PowerON_Reset,@function
|
||||
/* call to _PowerON_Reset */
|
||||
_PowerON_Reset:
|
||||
/* initialise user stack pointer */
|
||||
movw sp,#__stack /* Set stack pointer */
|
||||
|
||||
|
||||
/* load data section from ROM to RAM */
|
||||
;; block move to initialize .data
|
||||
|
||||
mov es, #LOW(HIGHW(__romdatastart))
|
||||
movw bc, #LOWW(__romdatacopysize)
|
||||
1:
|
||||
movw ax, bc
|
||||
cmpw ax, #0
|
||||
bz $1f
|
||||
decw bc
|
||||
decw bc
|
||||
movw ax, es:LOWW(__romdatastart)[bc]
|
||||
movw LOWW(__datastart)[bc], ax
|
||||
br $1b
|
||||
|
||||
;; if you used variables having initial value (far) then you would have to uncomment this.
|
||||
;; For example: char __far variable = 1;
|
||||
;1:
|
||||
; mov es, #LOW(HIGHW(__romdatafstart))
|
||||
; movw bc, #LOWW(__romdatafcopysize)
|
||||
;1:
|
||||
; movw ax, bc
|
||||
; cmpw ax, #0
|
||||
; bz $1f
|
||||
; decw bc
|
||||
; decw bc
|
||||
; movw ax, es:LOWW(__romdatafstart)[bc]
|
||||
; movw LOWW(__datafstart)[bc], ax
|
||||
; br $1b
|
||||
|
||||
1:
|
||||
mov es, #LOW(HIGHW(__romsdatastart))
|
||||
movw bc, #LOWW(__romsdatacopysize)
|
||||
1:
|
||||
movw ax, bc
|
||||
cmpw ax, #0
|
||||
bz $1f
|
||||
decw bc
|
||||
decw bc
|
||||
movw ax, es:LOWW(__romsdatastart)[bc]
|
||||
movw LOWW(__sdatastart)[bc], ax
|
||||
br $1b
|
||||
|
||||
;; block fill to .sbss
|
||||
1:
|
||||
#ifdef __OPTIMIZE_SIZE__
|
||||
movw de, #LOWW(__sbsssize)
|
||||
movw ax, #LOWW(__sbssstart)
|
||||
clrw bc
|
||||
call !!_memset
|
||||
#else
|
||||
movw bc, #LOWW(__sbsssize)
|
||||
clrw ax
|
||||
cmpw ax, bc
|
||||
bz $_sbss_zero_done
|
||||
1:
|
||||
decw bc
|
||||
decw bc
|
||||
movw LOWW(__sbssstart)[bc], ax
|
||||
cmpw ax, bc
|
||||
bnz $1b
|
||||
|
||||
_sbss_zero_done:
|
||||
#endif
|
||||
|
||||
;; block fill to .bss
|
||||
|
||||
#ifdef __OPTIMIZE_SIZE__
|
||||
movw de, #LOWW(__bsssize)
|
||||
movw ax, #LOWW(__bssstart)
|
||||
clrw bc
|
||||
call !!_memset
|
||||
#else
|
||||
movw bc, #LOWW(__bsssize)
|
||||
clrw ax
|
||||
cmpw ax, bc
|
||||
bz $_bss_zero_done
|
||||
1:
|
||||
decw bc
|
||||
decw bc
|
||||
movw LOWW(__bssstart)[bc], ax
|
||||
cmpw ax, bc
|
||||
bnz $1b
|
||||
|
||||
_bss_zero_done:
|
||||
#endif
|
||||
|
||||
;; block fill to .bssf
|
||||
|
||||
;; if you used variables which doesn't have initial value (far) then you would have to uncomment this'
|
||||
;; For example: char __far variable;
|
||||
;#ifdef __OPTIMIZE_SIZE__
|
||||
; movw de, #LOWW(__bssfsize)
|
||||
; movw ax, #LOWW(__bssfstart)
|
||||
; clrw bc
|
||||
; call !!_memset
|
||||
;#else
|
||||
;1:
|
||||
; movw bc, #LOWW(__bssfsize)
|
||||
; clrw ax
|
||||
; cmpw ax, bc
|
||||
; bz $_bssf_zero_done
|
||||
;1:
|
||||
; decw bc
|
||||
; decw bc
|
||||
; movw LOWW(__bssfstart)[bc], ax
|
||||
; cmpw ax, bc
|
||||
; bnz $1b
|
||||
|
||||
;_bssf_zero_done:
|
||||
;#endif
|
||||
|
||||
call !!__rl78_init
|
||||
|
||||
|
||||
/* call the hardware initialiser */
|
||||
call !!_HardwareSetup
|
||||
nop
|
||||
|
||||
|
||||
/* start user program */
|
||||
|
||||
clrw ax /* argv */
|
||||
clrw bc /* argc */
|
||||
call !!_main
|
||||
|
||||
|
||||
call !!__rl78_fini
|
||||
|
||||
.global _exit
|
||||
.type _exit,@function
|
||||
/* call to exit*/
|
||||
_exit:
|
||||
br $_exit
|
||||
|
||||
|
||||
/* ;; HL = start of list
|
||||
;; DE = end of list
|
||||
;; BC = step direction (+2 or -2)
|
||||
*/
|
||||
.global _rl78_run_init_array
|
||||
.type _rl78_run_init_array,@function
|
||||
_rl78_run_init_array:
|
||||
movw hl, #__init_array_start
|
||||
movw de, #__init_array_end
|
||||
#ifdef __RL78_MEDIUM__
|
||||
movw bc, #4
|
||||
#else
|
||||
movw bc, #2
|
||||
#endif
|
||||
br $_rl78_run_inilist
|
||||
|
||||
.global _rl78_run_fini_array
|
||||
.type _rl78_run_fini_array,@function
|
||||
_rl78_run_fini_array:
|
||||
movw hl, #__fini_array_start
|
||||
movw de, #__fini_array_end
|
||||
#ifdef __RL78_MEDIUM__
|
||||
movw bc, #4
|
||||
#else
|
||||
movw bc, #2
|
||||
#endif
|
||||
/* fall through */
|
||||
|
||||
;; HL = start of list
|
||||
;; DE = end of list
|
||||
;; BC = step direction (+2 or -2)
|
||||
_rl78_run_inilist:
|
||||
next_inilist:
|
||||
movw ax, hl
|
||||
cmpw ax, de
|
||||
bz $done_inilist
|
||||
movw ax, [hl]
|
||||
cmpw ax, #-1
|
||||
bz $skip_inilist
|
||||
cmpw ax, #0
|
||||
bz $skip_inilist
|
||||
push ax
|
||||
push bc
|
||||
push de
|
||||
push hl
|
||||
#ifdef __RL78_MEDIUM__
|
||||
push ax
|
||||
mov a, [hl+2]
|
||||
mov cs, a
|
||||
pop ax
|
||||
#endif
|
||||
call ax
|
||||
pop hl
|
||||
pop de
|
||||
pop bc
|
||||
pop ax
|
||||
skip_inilist:
|
||||
movw ax, hl
|
||||
addw ax, bc
|
||||
movw hl, ax
|
||||
br $next_inilist
|
||||
done_inilist:
|
||||
ret
|
||||
|
||||
|
||||
.global __rl78_init
|
||||
.type __rl78_init,@function
|
||||
__rl78_init:
|
||||
call !!_rl78_run_init_array
|
||||
ret
|
||||
|
||||
|
||||
.global __rl78_fini
|
||||
.type __rl78_fini,@function
|
||||
__rl78_fini:
|
||||
call !!_rl78_run_fini_array
|
||||
ret
|
||||
|
||||
|
||||
.end
|
||||
@@ -0,0 +1,171 @@
|
||||
/************************************************************************/
|
||||
/* Header file generated from device file: */
|
||||
/* DR5F1026A.DVF */
|
||||
/* V1.12 (2012/04/03) */
|
||||
/* Copyright(C) 2012 Renesas */
|
||||
/* Tool Version: 4.0.16 */
|
||||
/* Date Generated: 2025/02/05 */
|
||||
/************************************************************************/
|
||||
#include "interrupt_handlers.h"
|
||||
|
||||
extern void isr_tmr0(void);
|
||||
extern void isr_tmr1(void);
|
||||
|
||||
extern void iic_isr( void);
|
||||
|
||||
extern void PowerON_Reset (void);
|
||||
|
||||
const unsigned char Option_Bytes[] __attribute__ ((section (".option_bytes"))) =
|
||||
{
|
||||
0xef, // Disable WDT
|
||||
0x7f, // LVD reset mode 2.81 V
|
||||
0xe0, // HS mode: HOCO @ 24 MHZ (High-speed OnChip Oscillator)
|
||||
0x84 // Enable OCD, erase flash memory on authentication failure
|
||||
};
|
||||
|
||||
const unsigned char Security_Id[] __attribute__ ((section (".security_id"))) = {
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const unsigned char Debug_Monitor[] __attribute__ ((section (".debug_monitor"))) = {
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
|
||||
};
|
||||
|
||||
#define VEC __attribute__ ((section (".vec")))
|
||||
const void __near *HardwareVectors[] VEC =
|
||||
{
|
||||
PowerON_Reset, // power on reset
|
||||
(void*)0xFFFF // reserved for debugging
|
||||
};
|
||||
|
||||
#define VECT_SECT __attribute__ ((section (".vects")))
|
||||
const void __near *Vectors[] VECT_SECT = {
|
||||
//INT_WDTI (0x4)
|
||||
INT_WDTI,
|
||||
//INT_LVI (0x6)
|
||||
INT_LVI,
|
||||
//INT_P0 (0x8)
|
||||
INT_P0,
|
||||
//INT_P1 (0xA)
|
||||
INT_P1,
|
||||
//INT_P2 (0xC)
|
||||
INT_P2,
|
||||
//INT_P3 (0xE)
|
||||
INT_P3,
|
||||
//INT_DMA0 (0x10)
|
||||
INT_DMA0,
|
||||
//INT_DMA1 (0x12)
|
||||
INT_DMA1,
|
||||
//INT_CSI00/INT_IIC00/INT_ST0 (0x14)
|
||||
INT_ST0,
|
||||
//INT_CSI01/INT_IIC01/INT_SR0 (0x16)
|
||||
INT_SR0,
|
||||
//INT_SRE0 (0x18)
|
||||
INT_SRE0,
|
||||
//INT_TM01H (0x1A)
|
||||
INT_TM01H,
|
||||
//INT_TM03H (0x1C)
|
||||
INT_TM03H,
|
||||
//INT_IICA0 (0x1E)
|
||||
iic_isr,
|
||||
|
||||
//INT_TM00 (0x20)
|
||||
isr_tmr0,
|
||||
|
||||
//INT_TM01 (0x22)
|
||||
isr_tmr1,
|
||||
|
||||
//INT_TM02 (0x24)
|
||||
INT_TM02,
|
||||
//INT_TM03 (0x26)
|
||||
INT_TM03,
|
||||
//INT_AD (0x28)
|
||||
INT_AD,
|
||||
//INT_IT (0x2A)
|
||||
INT_IT,
|
||||
//INT_KR (0x2C)
|
||||
INT_KR,
|
||||
//INT_MD (0x2E)
|
||||
INT_MD,
|
||||
//INT_FL (0x30)
|
||||
INT_FL,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
//INT_BRK_I (0x7E)
|
||||
INT_BRK_I,
|
||||
};
|
||||
|
||||
Reference in New Issue
Block a user