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<option id="com.renesas.cdt.managedbuild.llvm.rl78.option.cpu.disableMda.1442600590" name="Disable multiplication code generation (-mdisable-mda)" superClass="com.renesas.cdt.managedbuild.llvm.rl78.option.cpu.disableMda" value="true" valueType="boolean"/>
|
||||
<option id="com.renesas.cdt.managedbuild.llvm.core.option.warnings.allwarn.658469504" name="Enable all warnings (-Wall)" superClass="com.renesas.cdt.managedbuild.llvm.core.option.warnings.allwarn" value="true" valueType="boolean"/>
|
||||
<option id="com.renesas.cdt.managedbuild.llvm.core.option.warnings.extrawarn.1265159624" name="Enable extra warnings (-Wextra)" superClass="com.renesas.cdt.managedbuild.llvm.core.option.warnings.extrawarn" value="true" valueType="boolean"/>
|
||||
<option id="com.renesas.cdt.managedbuild.llvm.core.option.warnings.conversion.635375111" name="Warn for implicit conversions (-Wconversion)" superClass="com.renesas.cdt.managedbuild.llvm.core.option.warnings.conversion" value="true" valueType="boolean"/>
|
||||
<option id="com.renesas.cdt.managedbuild.llvm.core.option.warnings.uninitialized.576813758" name="Warn for uninitialized variables (-Wuninitialized)" superClass="com.renesas.cdt.managedbuild.llvm.core.option.warnings.uninitialized" value="true" valueType="boolean"/>
|
||||
<option id="com.renesas.cdt.managedbuild.llvm.core.option.warnings.unused.1043679393" name="Warn for various unused elements (-Wunused)" superClass="com.renesas.cdt.managedbuild.llvm.core.option.warnings.unused" value="true" valueType="boolean"/>
|
||||
<option id="com.renesas.cdt.managedbuild.llvm.core.option.warnings.shadow.2051445305" name="Warn for shadowed variables (-Wshadow)" superClass="com.renesas.cdt.managedbuild.llvm.core.option.warnings.shadow" value="true" valueType="boolean"/>
|
||||
<option id="com.renesas.cdt.managedbuild.llvm.core.option.warnings.pointerarith.534651698" name="Warn if it depends on the “size of” a function(-Wpointer-arith)" superClass="com.renesas.cdt.managedbuild.llvm.core.option.warnings.pointerarith" value="true" valueType="boolean"/>
|
||||
<option id="com.renesas.cdt.managedbuild.llvm.core.option.warnings.agreggatereturn.1413527910" name="Warn if structures are returned (-Waggregate-return)" superClass="com.renesas.cdt.managedbuild.llvm.core.option.warnings.agreggatereturn" value="true" valueType="boolean"/>
|
||||
<option id="com.renesas.cdt.managedbuild.llvm.core.option.warnings.missingdeclaration.821733005" name="Warn for undeclared global functions (-Wmissing-declarations)" superClass="com.renesas.cdt.managedbuild.llvm.core.option.warnings.missingdeclaration" value="true" valueType="boolean"/>
|
||||
<option id="com.renesas.cdt.managedbuild.llvm.core.option.optimization.fnoaliasing.1692617025" name="Disable optimizations based on the type of expressions (-fno-strict-aliasing)" superClass="com.renesas.cdt.managedbuild.llvm.core.option.optimization.fnoaliasing" value="true" valueType="boolean"/>
|
||||
<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.renesas.cdt.managedbuild.llvm.core.targetPlatform.1222608311" isAbstract="false" osList="all" superClass="com.renesas.cdt.managedbuild.llvm.core.targetPlatform"/>
|
||||
<builder buildPath="${workspace_loc:/g12_dvm}/Release" id="com.renesas.cdt.managedbuild.llvm.core.builder.1433255926" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="LLVM for Renesas Builder" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.renesas.cdt.managedbuild.llvm.core.builder"/>
|
||||
<tool id="com.renesas.cdt.managedbuild.llvm.rl78.tool.smsAsm.1942599933" name="SMS Assembler" superClass="com.renesas.cdt.managedbuild.llvm.rl78.tool.smsAsm"/>
|
||||
<tool id="com.renesas.cdt.managedbuild.llvm.rl78.tool.libgen.2001546637" name="Library Generator" superClass="com.renesas.cdt.managedbuild.llvm.rl78.tool.libgen">
|
||||
<option id="com.renesas.cdt.managedbuild.llvm.rl78.option.selectLib.795371500" name="Select library" superClass="com.renesas.cdt.managedbuild.llvm.rl78.option.selectLib" value="com.renesas.cdt.managedbuild.llvm.core.option.librarygenerator.settings.selectLibrary.newLib" valueType="enumerated"/>
|
||||
<option id="com.renesas.cdt.managedbuild.llvm.rl78.option.libraryType.1395076747" name="Library type" superClass="com.renesas.cdt.managedbuild.llvm.rl78.option.libraryType" value="com.renesas.cdt.managedbuild.llvm.core.option.librarygenerator.settings.libraryType.preBuilt" valueType="enumerated"/>
|
||||
</tool>
|
||||
<tool id="com.renesas.cdt.managedbuild.llvm.rl78.tool.Compiler.1957795377" name="Compiler" superClass="com.renesas.cdt.managedbuild.llvm.rl78.tool.Compiler">
|
||||
<option id="com.renesas.cdt.managedbuild.llvm.core.option.compiler.source.optimizationLevel.2049218611" name="Optimization Level" superClass="com.renesas.cdt.managedbuild.llvm.core.option.compiler.source.optimizationLevel" useByScannerDiscovery="true" value="com.renesas.cdt.managedbuild.llvm.core.option.optimization.optimizationLevel.debug" valueType="enumerated"/>
|
||||
<option id="com.renesas.cdt.managedbuild.llvm.core.option.compiler.source.debugFormat.10537773" name="Debug format" superClass="com.renesas.cdt.managedbuild.llvm.core.option.compiler.source.debugFormat" useByScannerDiscovery="true" value="com.renesas.cdt.managedbuild.llvm.core.option.debug.debugFormat.Default" valueType="enumerated"/>
|
||||
<inputType id="com.renesas.cdt.managedbuild.llvm.core.inputType.compiler.c.646821940" superClass="com.renesas.cdt.managedbuild.llvm.core.inputType.compiler.c"/>
|
||||
</tool>
|
||||
<tool id="com.renesas.cdt.managedbuild.llvm.rl78.tool.cpp.compiler.1321931575" name="Compiler CPP" superClass="com.renesas.cdt.managedbuild.llvm.rl78.tool.cpp.compiler">
|
||||
<option id="com.renesas.cdt.managedbuild.llvm.core.option.compiler.source.optimizationLevel.907513446" name="Optimization Level" superClass="com.renesas.cdt.managedbuild.llvm.core.option.compiler.source.optimizationLevel" useByScannerDiscovery="true" value="com.renesas.cdt.managedbuild.llvm.core.option.optimization.optimizationLevel.debug" valueType="enumerated"/>
|
||||
<option id="com.renesas.cdt.managedbuild.llvm.core.option.compiler.source.debugFormat.1815091678" name="Debug format" superClass="com.renesas.cdt.managedbuild.llvm.core.option.compiler.source.debugFormat" useByScannerDiscovery="true" value="com.renesas.cdt.managedbuild.llvm.core.option.debug.debugFormat.Default" valueType="enumerated"/>
|
||||
</tool>
|
||||
<tool id="com.renesas.cdt.managedbuild.llvm.rl78.tool.Assembler.611975506" name="Assembler" superClass="com.renesas.cdt.managedbuild.llvm.rl78.tool.Assembler">
|
||||
<option id="com.renesas.cdt.managedbuild.llvm.core.option.assembler.source.usepreprocessor.1197998112" name="Use preprocessor (-x assembler-with-cpp)" superClass="com.renesas.cdt.managedbuild.llvm.core.option.assembler.source.usepreprocessor"/>
|
||||
<inputType id="com.renesas.cdt.managedbuild.llvm.core.inputType.assembler.807895396" superClass="com.renesas.cdt.managedbuild.llvm.core.inputType.assembler"/>
|
||||
</tool>
|
||||
<tool id="com.renesas.cdt.managedbuild.llvm.rl78.tool.Linker.133953416" name="Linker" superClass="com.renesas.cdt.managedbuild.llvm.rl78.tool.Linker">
|
||||
<option id="com.renesas.cdt.managedbuild.llvm.core.option.linker.misc.inputsections.2137967420" name="Enable garbage collection of unused input sections(-gc-sections)" superClass="com.renesas.cdt.managedbuild.llvm.core.option.linker.misc.inputsections" value="true" valueType="boolean"/>
|
||||
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="true" id="com.renesas.cdt.managedbuild.llvm.rl78.Linker.option.archiveSearchDirectories.1380172529" name="Archive search directories (-L) [Only the path to the library]" superClass="com.renesas.cdt.managedbuild.llvm.rl78.Linker.option.archiveSearchDirectories" valueType="stringList"/>
|
||||
<inputType id="com.renesas.cdt.managedbuild.llvm.core.inputType.linker.c.2030575940" superClass="com.renesas.cdt.managedbuild.llvm.core.inputType.linker.c">
|
||||
<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
|
||||
<additionalInput kind="additionalinput" paths="$(LIBS)"/>
|
||||
<additionalInput kind="additionalinputdependency" paths="$(LIBRARY_GENERATOR_OUTPUTTYPE_OUTPUTS)"/>
|
||||
<additionalInput kind="additionaldependency" paths="$(LINKER_SCRIPT)"/>
|
||||
</inputType>
|
||||
</tool>
|
||||
<tool id="com.renesas.cdt.managedbuild.llvm.rl78.tool.cpp.linker.866688491" name="Linker CPP" superClass="com.renesas.cdt.managedbuild.llvm.rl78.tool.cpp.linker">
|
||||
<option id="com.renesas.cdt.managedbuild.llvm.core.option.linker.misc.inputsections.90295732" name="Enable garbage collection of unused input sections(-gc-sections)" superClass="com.renesas.cdt.managedbuild.llvm.core.option.linker.misc.inputsections" value="true" valueType="boolean"/>
|
||||
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="true" id="com.renesas.cdt.managedbuild.llvm.rl78.linker.cpp.option.archiveSearchDirectories.526843910" name="Archive search directories (-L) [Only the path to the library]" superClass="com.renesas.cdt.managedbuild.llvm.rl78.linker.cpp.option.archiveSearchDirectories" valueType="stringList"/>
|
||||
</tool>
|
||||
<tool id="com.renesas.cdt.managedbuild.llvm.rl78.tool.Objcopy.1854442533" name="Objcopy" superClass="com.renesas.cdt.managedbuild.llvm.rl78.tool.Objcopy"/>
|
||||
<tool id="com.renesas.cdt.managedbuild.llvm.rl78.tool.archiver.1346560219" name="Archiver" superClass="com.renesas.cdt.managedbuild.llvm.rl78.tool.archiver"/>
|
||||
<tool id="com.renesas.cdt.managedbuild.llvm.rl78.tool.PrintSize.1011274175" name="Print Size" superClass="com.renesas.cdt.managedbuild.llvm.rl78.tool.PrintSize">
|
||||
<option id="com.renesas.cdt.managedbuild.llvm.core.option.printSize.general.sizeFormat.554700626" name="Size Format" superClass="com.renesas.cdt.managedbuild.llvm.core.option.printSize.general.sizeFormat"/>
|
||||
</tool>
|
||||
<tool id="com.renesas.cdt.managedbuild.llvm.core.tool.readelf.1677157735" name="Readelf" superClass="com.renesas.cdt.managedbuild.llvm.core.tool.readelf"/>
|
||||
<tool id="com.renesas.cdt.managedbuild.llvm.rl78.tool.objdump.2139752372" name="Objdump" superClass="com.renesas.cdt.managedbuild.llvm.rl78.tool.objdump"/>
|
||||
<tool id="com.renesas.cdt.managedbuild.llvm.rl78.faa.566644932" name="FAA Assembler" superClass="com.renesas.cdt.managedbuild.llvm.rl78.faa">
|
||||
<option id="com.renesas.cdt.managedbuild.llvm.rl78.faa.option.label.269369592" name="Handle labels as a global symbol (-label global)" superClass="com.renesas.cdt.managedbuild.llvm.rl78.faa.option.label" value="true" valueType="boolean"/>
|
||||
</tool>
|
||||
<tool id="com.renesas.cdt.managedbuild.llvm.rl78.tool.converter.1109112663" name="Converter" superClass="com.renesas.cdt.managedbuild.llvm.rl78.tool.converter"/>
|
||||
</toolChain>
|
||||
</folderInfo>
|
||||
<sourceEntries>
|
||||
<entry flags="VALUE_WORKSPACE_PATH" kind="sourcePath" name="src"/>
|
||||
<entry flags="VALUE_WORKSPACE_PATH" kind="sourcePath" name="generate"/>
|
||||
</sourceEntries>
|
||||
</configuration>
|
||||
</storageModule>
|
||||
<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
|
||||
</cconfiguration>
|
||||
</storageModule>
|
||||
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
|
||||
<project id="g12_dvm.com.renesas.cdt.managedbuild.llvm.rl78.projectType.Id.648735268" name="Executable" projectType="com.renesas.cdt.managedbuild.llvm.rl78.projectType.Id"/>
|
||||
</storageModule>
|
||||
<storageModule moduleId="scannerConfiguration">
|
||||
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
|
||||
<scannerConfigBuildInfo instanceId="com.renesas.cdt.managedbuild.llvm.rl78.configuration.debug.322613294;com.renesas.cdt.managedbuild.llvm.rl78.configuration.debug.322613294.;com.renesas.cdt.managedbuild.llvm.rl78.tool.Compiler.1114634341;com.renesas.cdt.managedbuild.llvm.core.inputType.compiler.c.1613843369">
|
||||
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
|
||||
</scannerConfigBuildInfo>
|
||||
<scannerConfigBuildInfo instanceId="com.renesas.cdt.managedbuild.llvm.rl78.configuration.debug.1205814803;com.renesas.cdt.managedbuild.llvm.rl78.configuration.debug.1205814803.;com.renesas.cdt.managedbuild.llvm.rl78.tool.Compiler.1375567923;com.renesas.cdt.managedbuild.llvm.core.inputType.compiler.c.929430530">
|
||||
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
|
||||
</scannerConfigBuildInfo>
|
||||
<scannerConfigBuildInfo instanceId="com.renesas.cdt.managedbuild.llvm.rl78.configuration.release.80962813;com.renesas.cdt.managedbuild.llvm.rl78.configuration.release.80962813.;com.renesas.cdt.managedbuild.llvm.rl78.tool.Compiler.1957795377;com.renesas.cdt.managedbuild.llvm.core.inputType.compiler.c.646821940">
|
||||
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
|
||||
</scannerConfigBuildInfo>
|
||||
</storageModule>
|
||||
<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
|
||||
<storageModule moduleId="refreshScope" versionNumber="2">
|
||||
<configuration configurationName="cfgDebSw"/>
|
||||
<configuration configurationName="cfgRel"/>
|
||||
<configuration configurationName="HardwareDebug">
|
||||
<resource resourceType="PROJECT" workspacePath="/g12_dvm"/>
|
||||
</configuration>
|
||||
<configuration configurationName="cfgDbgHW">
|
||||
<resource resourceType="PROJECT" workspacePath="/g12_dvm"/>
|
||||
</configuration>
|
||||
<configuration configurationName="cfgDebHw">
|
||||
<resource resourceType="PROJECT" workspacePath="/g12_dvm"/>
|
||||
</configuration>
|
||||
<configuration configurationName="Debug">
|
||||
<resource resourceType="PROJECT" workspacePath="/g12_dvm"/>
|
||||
</configuration>
|
||||
<configuration configurationName="Release">
|
||||
<resource resourceType="PROJECT" workspacePath="/g12_dvm"/>
|
||||
</configuration>
|
||||
</storageModule>
|
||||
<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
|
||||
<storageModule moduleId="org.eclipse.cdt.internal.ui.text.commentOwnerProjectMappings"/>
|
||||
</cproject>
|
||||
@@ -0,0 +1 @@
|
||||
cfgDebHw
|
||||
@@ -0,0 +1,33 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<projectDescription>
|
||||
<name>g12_dvm</name>
|
||||
<comment></comment>
|
||||
<projects>
|
||||
</projects>
|
||||
<buildSpec>
|
||||
<buildCommand>
|
||||
<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
|
||||
<triggers>clean,full,incremental,</triggers>
|
||||
<arguments>
|
||||
</arguments>
|
||||
</buildCommand>
|
||||
<buildCommand>
|
||||
<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
|
||||
<triggers>full,incremental,</triggers>
|
||||
<arguments>
|
||||
</arguments>
|
||||
</buildCommand>
|
||||
<buildCommand>
|
||||
<name>com.renesas.cdt.managedbuild.jsoncdb.compilationdatabase.compilationDatabaseBuilder</name>
|
||||
<triggers>full,incremental,</triggers>
|
||||
<arguments>
|
||||
</arguments>
|
||||
</buildCommand>
|
||||
</buildSpec>
|
||||
<natures>
|
||||
<nature>org.eclipse.cdt.core.cnature</nature>
|
||||
<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
|
||||
<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
|
||||
<nature>com.renesas.cdt.managedbuild.jsoncdb.compilationdatabase.CompileCommandsNature</nature>
|
||||
</natures>
|
||||
</projectDescription>
|
||||
@@ -0,0 +1,7 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
||||
<Configs>
|
||||
<versionXML>1.0</versionXML>
|
||||
<Config core="SINGLE_CORE">
|
||||
<EnableCoverage Status="false"/>
|
||||
</Config>
|
||||
</Configs>
|
||||
@@ -0,0 +1,13 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
||||
<DebugVirtualConsoleSetting version="1.0">
|
||||
|
||||
<Config core="SINGLE_CORE">
|
||||
<DebugConsole-Enable>false</DebugConsole-Enable>
|
||||
<DebugConsole-LogFile/>
|
||||
<DebugConsole-IsLogging>false</DebugConsole-IsLogging>
|
||||
<DebugConsole-COMport/>
|
||||
<DebugConsole-Baudrate>0</DebugConsole-Baudrate>
|
||||
<DebugConsole-EchoBack>true</DebugConsole-EchoBack>
|
||||
<DebugConsole-ClearBuffer>false</DebugConsole-ClearBuffer>
|
||||
</Config>
|
||||
</DebugVirtualConsoleSetting>
|
||||
@@ -0,0 +1,14 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
||||
<Configs>
|
||||
<History>
|
||||
<Keyword>f0090</Keyword>
|
||||
<Keyword>ff090</Keyword>
|
||||
<Keyword>hoco</Keyword>
|
||||
<Keyword>hiostop</Keyword>
|
||||
<Keyword>osmc</Keyword>
|
||||
<Keyword>mcm0</Keyword>
|
||||
<Keyword>mstop</Keyword>
|
||||
<Keyword>cmc</Keyword>
|
||||
<Keyword>option</Keyword>
|
||||
</History>
|
||||
</Configs>
|
||||
@@ -0,0 +1,11 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
||||
<Configs>
|
||||
<versionXML>1.1</versionXML>
|
||||
<Config Core="SINGLE_CORE">
|
||||
<TimeUnit TimeUnit="Nanosecond"/>
|
||||
<Timer_Settings>
|
||||
<Timer Break_on_Overflow="false" Link_Timer="false" Reset_before_run="false" Run_once_only="false" Timer_ID="Run-Break" Timer_Mode="PERF_RUN_BREAK" Wrap_on_Overflow="false"/>
|
||||
</Timer_Settings>
|
||||
</Config>
|
||||
<EnablePerfAnalysis Status="false"/>
|
||||
</Configs>
|
||||
@@ -0,0 +1,3 @@
|
||||
#
|
||||
#Thu Jan 08 13:29:28 CET 2026
|
||||
activeConfiguration=com.renesas.cdt.managedbuild.llvm.rl78.configuration.debug.322613294
|
||||
@@ -0,0 +1,36 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
||||
<project>
|
||||
<configuration id="com.renesas.cdt.managedbuild.llvm.rl78.configuration.debug.322613294" name="cfgDebHw">
|
||||
<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
|
||||
<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
|
||||
<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="1985206040535511919" id="com.renesas.cdt.managedbuild.llvm.rl78.ui.languageprovider" keep-relative-paths="false" name="LLVM RL78 Toolchain Builtin Language Settings" parameter="${COMMAND} ${toolchain_flags} ${FLAGS} -E -P -v -dD "${INPUTS}"" prefer-non-shared="true">
|
||||
<language-scope id="org.eclipse.cdt.core.gcc"/>
|
||||
<language-scope id="org.eclipse.cdt.core.g++"/>
|
||||
</provider>
|
||||
<provider-reference id="com.renesas.cdt.managedbuild.llvm.rl78.ui.userlanguageprovider" ref="shared-provider"/>
|
||||
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
|
||||
</extension>
|
||||
</configuration>
|
||||
<configuration id="com.renesas.cdt.managedbuild.llvm.rl78.configuration.debug.1205814803" name="cfgDebSw">
|
||||
<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
|
||||
<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
|
||||
<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="1891020217330991951" id="com.renesas.cdt.managedbuild.llvm.rl78.ui.languageprovider" keep-relative-paths="false" name="LLVM RL78 Toolchain Builtin Language Settings" parameter="${COMMAND} ${toolchain_flags} ${FLAGS} -E -P -v -dD "${INPUTS}"" prefer-non-shared="true">
|
||||
<language-scope id="org.eclipse.cdt.core.gcc"/>
|
||||
<language-scope id="org.eclipse.cdt.core.g++"/>
|
||||
</provider>
|
||||
<provider-reference id="com.renesas.cdt.managedbuild.llvm.rl78.ui.userlanguageprovider" ref="shared-provider"/>
|
||||
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
|
||||
</extension>
|
||||
</configuration>
|
||||
<configuration id="com.renesas.cdt.managedbuild.llvm.rl78.configuration.release.80962813" name="cfgRel">
|
||||
<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
|
||||
<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
|
||||
<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="1916138241141032463" id="com.renesas.cdt.managedbuild.llvm.rl78.ui.languageprovider" keep-relative-paths="false" name="LLVM RL78 Toolchain Builtin Language Settings" parameter="${COMMAND} ${toolchain_flags} ${FLAGS} -E -P -v -dD "${INPUTS}"" prefer-non-shared="true">
|
||||
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|
||||
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|
||||
<stringAttribute key="org.eclipse.dsf.launch.MEMORY_BLOCKS" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?><memoryBlockExpressionList context="reserved-for-future-use"><gdbmemoryBlockExpression address="194" core_thread_id="1_i1" label="0xc2"><memoryRendering id="org.eclipse.debug.ui.rendering.hexint"><renderingProperty name="org.eclipse.debug.ui.AbstractTableRendering.colSize" value="1"/><renderingProperty name="org.eclipse.debug.ui.AbstractTableRendering.rowSize" value="16"/><renderingInstance containerId="org.eclipse.debug.ui.MemoryView.RenderingViewPane.1" viewId="org.eclipse.debug.ui.MemoryView" viewSecondaryId=""/></memoryRendering></gdbmemoryBlockExpression><gdbmemoryBlockExpression address="0" core_thread_id="1_i1" label="0"><memoryRendering id="org.eclipse.debug.ui.rendering.hexint"><renderingProperty name="org.eclipse.debug.ui.AbstractTableRendering.colSize" value="2"/><renderingProperty name="org.eclipse.debug.ui.AbstractTableRendering.rowSize" value="16"/><renderingInstance containerId="org.eclipse.debug.ui.MemoryView.RenderingViewPane.1" viewId="org.eclipse.debug.ui.MemoryView" viewSecondaryId=""/></memoryRendering></gdbmemoryBlockExpression><gdbmemoryBlockExpression address="983184" core_thread_id="1_i1" label="0xf0090"><memoryRendering id="org.eclipse.debug.ui.rendering.hexint"><renderingProperty name="org.eclipse.debug.ui.AbstractTableRendering.colSize" value="1"/><renderingProperty name="org.eclipse.debug.ui.AbstractTableRendering.rowSize" value="16"/><renderingInstance containerId="org.eclipse.debug.ui.MemoryView.RenderingViewPane.1" viewId="org.eclipse.debug.ui.MemoryView" viewSecondaryId=""/></memoryRendering></gdbmemoryBlockExpression></memoryBlockExpressionList>"/>
|
||||
<stringAttribute key="process_factory_id" value="org.eclipse.cdt.dsf.gdb.GdbProcessFactory"/>
|
||||
<stringAttribute key="saved_expressions<seperator>Unknown" value="vec"/>
|
||||
</launchConfiguration>
|
||||
@@ -0,0 +1,16 @@
|
||||
/************************************************************************/
|
||||
/* File Version: V1.00 */
|
||||
/* Date Generated: 10/09/2013 */
|
||||
/************************************************************************/
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
extern void HardwareSetup(void);
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
void HardwareSetup(void)
|
||||
{
|
||||
|
||||
}
|
||||
@@ -0,0 +1,140 @@
|
||||
/************************************************************************/
|
||||
/* Header file generated from device file: */
|
||||
/* DR5F1026A.DVF */
|
||||
/* V1.12 (2012/04/03) */
|
||||
/* Copyright(C) 2012 Renesas */
|
||||
/* Tool Version: 4.0.0 */
|
||||
/* Date Generated: 2020/01/17 */
|
||||
/************************************************************************/
|
||||
#ifndef INTERRUPT_HANDLERS_H
|
||||
#define INTERRUPT_HANDLERS_H
|
||||
|
||||
/*
|
||||
* INT_WDTI (0x4)
|
||||
*/
|
||||
void INT_WDTI(void) __attribute__ ((interrupt));
|
||||
|
||||
|
||||
/*
|
||||
* INT_LVI (0x6)
|
||||
*/
|
||||
void INT_LVI(void) __attribute__ ((interrupt));
|
||||
|
||||
/*
|
||||
* INT_P0 (0x8)
|
||||
*/
|
||||
void INT_P0(void) __attribute__ ((interrupt));
|
||||
|
||||
/*
|
||||
* INT_P1 (0xA)
|
||||
*/
|
||||
void INT_P1(void) __attribute__ ((interrupt));
|
||||
|
||||
/*
|
||||
* INT_P2 (0xC)
|
||||
*/
|
||||
void INT_P2(void) __attribute__ ((interrupt));
|
||||
|
||||
/*
|
||||
* INT_P3 (0xE)
|
||||
*/
|
||||
void INT_P3(void) __attribute__ ((interrupt));
|
||||
|
||||
/*
|
||||
* INT_DMA0 (0x10)
|
||||
*/
|
||||
void INT_DMA0(void) __attribute__ ((interrupt));
|
||||
|
||||
/*
|
||||
* INT_DMA1 (0x12)
|
||||
*/
|
||||
void INT_DMA1(void) __attribute__ ((interrupt));
|
||||
|
||||
/*
|
||||
* INT_CSI00/INT_IIC00/INT_ST0 (0x14)
|
||||
*/
|
||||
void INT_ST0(void) __attribute__ ((interrupt));
|
||||
//void INT_CSI00(void) __attribute__ ((interrupt));
|
||||
//void INT_IIC00(void) __attribute__ ((interrupt));
|
||||
|
||||
/*
|
||||
* INT_CSI01/INT_IIC01/INT_SR0 (0x16)
|
||||
*/
|
||||
void INT_SR0(void) __attribute__ ((interrupt));
|
||||
//void INT_CSI01(void) __attribute__ ((interrupt));
|
||||
//void INT_IIC01(void) __attribute__ ((interrupt));
|
||||
|
||||
/*
|
||||
* INT_SRE0 (0x18)
|
||||
*/
|
||||
void INT_SRE0(void) __attribute__ ((interrupt));
|
||||
|
||||
/*
|
||||
* INT_TM01H (0x1A)
|
||||
*/
|
||||
void INT_TM01H(void) __attribute__ ((interrupt));
|
||||
|
||||
/*
|
||||
* INT_TM03H (0x1C)
|
||||
*/
|
||||
void INT_TM03H(void) __attribute__ ((interrupt));
|
||||
|
||||
/*
|
||||
* INT_IICA0 (0x1E)
|
||||
*/
|
||||
void INT_IICA0(void) __attribute__ ((interrupt));
|
||||
|
||||
/*
|
||||
* INT_TM00 (0x20)
|
||||
*/
|
||||
void INT_TM00(void) __attribute__ ((interrupt));
|
||||
|
||||
/*
|
||||
* INT_TM01 (0x22)
|
||||
*/
|
||||
void INT_TM01(void) __attribute__ ((interrupt));
|
||||
|
||||
/*
|
||||
* INT_TM02 (0x24)
|
||||
*/
|
||||
void INT_TM02(void) __attribute__ ((interrupt));
|
||||
|
||||
/*
|
||||
* INT_TM03 (0x26)
|
||||
*/
|
||||
void INT_TM03(void) __attribute__ ((interrupt));
|
||||
|
||||
/*
|
||||
* INT_AD (0x28)
|
||||
*/
|
||||
void INT_AD(void) __attribute__ ((interrupt));
|
||||
|
||||
/*
|
||||
* INT_IT (0x2A)
|
||||
*/
|
||||
void INT_IT(void) __attribute__ ((interrupt));
|
||||
|
||||
/*
|
||||
* INT_KR (0x2C)
|
||||
*/
|
||||
void INT_KR(void) __attribute__ ((interrupt));
|
||||
|
||||
/*
|
||||
* INT_MD (0x2E)
|
||||
*/
|
||||
void INT_MD(void) __attribute__ ((interrupt));
|
||||
|
||||
/*
|
||||
* INT_FL (0x30)
|
||||
*/
|
||||
void INT_FL(void) __attribute__ ((interrupt));
|
||||
|
||||
/*
|
||||
* INT_BRK_I (0x7E)
|
||||
*/
|
||||
void INT_BRK_I(void) __attribute__ ((interrupt));
|
||||
|
||||
//Hardware Vectors
|
||||
//PowerON_Reset (0x0)
|
||||
void PowerON_Reset(void) __attribute__ ((interrupt));
|
||||
#endif
|
||||
@@ -0,0 +1,136 @@
|
||||
/************************************************************************/
|
||||
/* Header file generated from device file: */
|
||||
/* DR5F1026A.DVF */
|
||||
/* V1.12 (2012/04/03) */
|
||||
/* Copyright(C) 2012 Renesas */
|
||||
/* Tool Version: 4.0.0 */
|
||||
/* Date Generated: 2020/01/17 */
|
||||
/************************************************************************/
|
||||
#include "interrupt_handlers.h"
|
||||
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* INT_WDTI (0x4)
|
||||
*/
|
||||
void INT_WDTI (void) { }
|
||||
|
||||
/*
|
||||
* INT_LVI (0x6)
|
||||
*/
|
||||
void INT_LVI (void) { }
|
||||
|
||||
/*
|
||||
* INT_P0 (0x8)
|
||||
*/
|
||||
void INT_P0 (void) { }
|
||||
|
||||
/*
|
||||
* INT_P1 (0xA)
|
||||
*/
|
||||
void INT_P1 (void) { }
|
||||
|
||||
/*
|
||||
* INT_P2 (0xC)
|
||||
*/
|
||||
void INT_P2 (void) { }
|
||||
|
||||
/*
|
||||
* INT_P3 (0xE)
|
||||
*/
|
||||
void INT_P3 (void) { }
|
||||
|
||||
/*
|
||||
* INT_DMA0 (0x10)
|
||||
*/
|
||||
void INT_DMA0 (void) { }
|
||||
|
||||
/*
|
||||
* INT_DMA1 (0x12)
|
||||
*/
|
||||
void INT_DMA1 (void) { }
|
||||
|
||||
/*
|
||||
* INT_CSI00/INT_IIC00/INT_ST0 (0x14)
|
||||
*/
|
||||
void INT_ST0 (void) { }
|
||||
//void INT_CSI00 (void) { }
|
||||
//void INT_IIC00 (void) { }
|
||||
|
||||
/*
|
||||
* INT_CSI01/INT_IIC01/INT_SR0 (0x16)
|
||||
*/
|
||||
void INT_SR0 (void) { }
|
||||
//void INT_CSI01 (void) { }
|
||||
//void INT_IIC01 (void) { }
|
||||
|
||||
/*
|
||||
* INT_SRE0 (0x18)
|
||||
*/
|
||||
void INT_SRE0 (void) { }
|
||||
|
||||
/*
|
||||
* INT_TM01H (0x1A)
|
||||
*/
|
||||
void INT_TM01H (void) { }
|
||||
|
||||
/*
|
||||
* INT_TM03H (0x1C)
|
||||
*/
|
||||
void INT_TM03H (void) { }
|
||||
|
||||
/*
|
||||
* INT_IICA0 (0x1E)
|
||||
*/
|
||||
void INT_IICA0 (void) { }
|
||||
|
||||
/*
|
||||
* INT_TM00 (0x20)
|
||||
*/
|
||||
void INT_TM00 (void) { }
|
||||
|
||||
/*
|
||||
* INT_TM01 (0x22)
|
||||
*/
|
||||
void INT_TM01 (void) { }
|
||||
|
||||
/*
|
||||
* INT_TM02 (0x24)
|
||||
*/
|
||||
void INT_TM02 (void) { }
|
||||
|
||||
/*
|
||||
* INT_TM03 (0x26)
|
||||
*/
|
||||
void INT_TM03 (void) { }
|
||||
|
||||
/*
|
||||
* INT_AD (0x28)
|
||||
*/
|
||||
void INT_AD (void) { }
|
||||
|
||||
/*
|
||||
* INT_IT (0x2A)
|
||||
*/
|
||||
void INT_IT (void) { }
|
||||
|
||||
/*
|
||||
* INT_KR (0x2C)
|
||||
*/
|
||||
void INT_KR (void) { }
|
||||
|
||||
/*
|
||||
* INT_MD (0x2E)
|
||||
*/
|
||||
void INT_MD (void) { }
|
||||
|
||||
/*
|
||||
* INT_FL (0x30)
|
||||
*/
|
||||
void INT_FL (void) { }
|
||||
|
||||
/*
|
||||
* INT_BRK_I (0x7E)
|
||||
*/
|
||||
void INT_BRK_I (void) { }
|
||||
@@ -0,0 +1,591 @@
|
||||
/************************************************************************/
|
||||
/* Header file generated from device file: */
|
||||
/* DR5F1026A.DVF */
|
||||
/* V1.12b (2022/09/15) */
|
||||
/* Copyright(C) 2022 Renesas */
|
||||
/* Tool Version: 4.0.5 */
|
||||
/* Date Generated: 2021/03/09 */
|
||||
/************************************************************************/
|
||||
|
||||
#ifndef __INTRINSIC_FUNCTIONS
|
||||
#define __INTRINSIC_FUNCTIONS
|
||||
|
||||
#define DI() __builtin_rl78_di()
|
||||
#define EI() __builtin_rl78_ei()
|
||||
#define HALT() __halt()
|
||||
#define NOP() __nop()
|
||||
#define STOP() __stop()
|
||||
|
||||
#endif
|
||||
|
||||
#ifndef __IOREG_BIT_STRUCTURES
|
||||
#define __IOREG_BIT_STRUCTURES
|
||||
typedef struct {
|
||||
unsigned char no0 :1;
|
||||
unsigned char no1 :1;
|
||||
unsigned char no2 :1;
|
||||
unsigned char no3 :1;
|
||||
unsigned char no4 :1;
|
||||
unsigned char no5 :1;
|
||||
unsigned char no6 :1;
|
||||
unsigned char no7 :1;
|
||||
} __BITS8;
|
||||
|
||||
typedef struct {
|
||||
unsigned short no0 :1;
|
||||
unsigned short no1 :1;
|
||||
unsigned short no2 :1;
|
||||
unsigned short no3 :1;
|
||||
unsigned short no4 :1;
|
||||
unsigned short no5 :1;
|
||||
unsigned short no6 :1;
|
||||
unsigned short no7 :1;
|
||||
unsigned short no8 :1;
|
||||
unsigned short no9 :1;
|
||||
unsigned short no10 :1;
|
||||
unsigned short no11 :1;
|
||||
unsigned short no12 :1;
|
||||
unsigned short no13 :1;
|
||||
unsigned short no14 :1;
|
||||
unsigned short no15 :1;
|
||||
} __BITS16;
|
||||
|
||||
#endif
|
||||
|
||||
#ifndef IODEFINE_H
|
||||
#define IODEFINE_H
|
||||
|
||||
/*
|
||||
IO Registers
|
||||
*/
|
||||
union un_p1 {
|
||||
unsigned char p1;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_p2 {
|
||||
unsigned char p2;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_p4 {
|
||||
unsigned char p4;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_p6 {
|
||||
unsigned char p6;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_p12 {
|
||||
unsigned char p12;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_p13 {
|
||||
unsigned char p13;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_pm1 {
|
||||
unsigned char pm1;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_pm2 {
|
||||
unsigned char pm2;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_pm4 {
|
||||
unsigned char pm4;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_pm6 {
|
||||
unsigned char pm6;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_adm0 {
|
||||
unsigned char adm0;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_ads {
|
||||
unsigned char ads;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_adm1 {
|
||||
unsigned char adm1;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_krctl {
|
||||
unsigned char krctl;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_krm0 {
|
||||
unsigned char krm0;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_egp0 {
|
||||
unsigned char egp0;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_egn0 {
|
||||
unsigned char egn0;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_iics0 {
|
||||
unsigned char iics0;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_iicf0 {
|
||||
unsigned char iicf0;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_csc {
|
||||
unsigned char csc;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_ostc {
|
||||
unsigned char ostc;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_ckc {
|
||||
unsigned char ckc;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_cks0 {
|
||||
unsigned char cks0;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_lvim {
|
||||
unsigned char lvim;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_lvis {
|
||||
unsigned char lvis;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_dmc0 {
|
||||
unsigned char dmc0;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_dmc1 {
|
||||
unsigned char dmc1;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_drc0 {
|
||||
unsigned char drc0;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_drc1 {
|
||||
unsigned char drc1;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_if0 {
|
||||
unsigned short if0;
|
||||
__BITS16 BIT;
|
||||
};
|
||||
union un_if0l {
|
||||
unsigned char if0l;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_if0h {
|
||||
unsigned char if0h;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_if1 {
|
||||
unsigned short if1;
|
||||
__BITS16 BIT;
|
||||
};
|
||||
union un_if1l {
|
||||
unsigned char if1l;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_mk0 {
|
||||
unsigned short mk0;
|
||||
__BITS16 BIT;
|
||||
};
|
||||
union un_mk0l {
|
||||
unsigned char mk0l;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_mk0h {
|
||||
unsigned char mk0h;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_mk1 {
|
||||
unsigned short mk1;
|
||||
__BITS16 BIT;
|
||||
};
|
||||
union un_mk1l {
|
||||
unsigned char mk1l;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_pr00 {
|
||||
unsigned short pr00;
|
||||
__BITS16 BIT;
|
||||
};
|
||||
union un_pr00l {
|
||||
unsigned char pr00l;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_pr00h {
|
||||
unsigned char pr00h;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_pr01 {
|
||||
unsigned short pr01;
|
||||
__BITS16 BIT;
|
||||
};
|
||||
union un_pr01l {
|
||||
unsigned char pr01l;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_pr10 {
|
||||
unsigned short pr10;
|
||||
__BITS16 BIT;
|
||||
};
|
||||
union un_pr10l {
|
||||
unsigned char pr10l;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_pr10h {
|
||||
unsigned char pr10h;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_pr11 {
|
||||
unsigned short pr11;
|
||||
__BITS16 BIT;
|
||||
};
|
||||
union un_pr11l {
|
||||
unsigned char pr11l;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_pmc {
|
||||
unsigned char pmc;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
|
||||
#define P1 (*(volatile union un_p1 *)0xFFF01).p1
|
||||
#define P1_bit (*(volatile union un_p1 *)0xFFF01).BIT
|
||||
#define P2 (*(volatile union un_p2 *)0xFFF02).p2
|
||||
#define P2_bit (*(volatile union un_p2 *)0xFFF02).BIT
|
||||
#define P4 (*(volatile union un_p4 *)0xFFF04).p4
|
||||
#define P4_bit (*(volatile union un_p4 *)0xFFF04).BIT
|
||||
#define P6 (*(volatile union un_p6 *)0xFFF06).p6
|
||||
#define P6_bit (*(volatile union un_p6 *)0xFFF06).BIT
|
||||
#define P12 (*(volatile union un_p12 *)0xFFF0C).p12
|
||||
#define P12_bit (*(volatile union un_p12 *)0xFFF0C).BIT
|
||||
#define P13 (*(volatile union un_p13 *)0xFFF0D).p13
|
||||
#define P13_bit (*(volatile union un_p13 *)0xFFF0D).BIT
|
||||
#define SDR00 (*(volatile unsigned short *)0xFFF10)
|
||||
#define SIO00 (*(volatile unsigned char *)0xFFF10)
|
||||
#define TXD0 (*(volatile unsigned char *)0xFFF10)
|
||||
#define SDR01 (*(volatile unsigned short *)0xFFF12)
|
||||
#define RXD0 (*(volatile unsigned char *)0xFFF12)
|
||||
#define SIO01 (*(volatile unsigned char *)0xFFF12)
|
||||
#define TDR00 (*(volatile unsigned short *)0xFFF18)
|
||||
#define TDR01 (*(volatile unsigned short *)0xFFF1A)
|
||||
#define TDR01L (*(volatile unsigned char *)0xFFF1A)
|
||||
#define TDR01H (*(volatile unsigned char *)0xFFF1B)
|
||||
#define ADCR (*(volatile unsigned short *)0xFFF1E)
|
||||
#define ADCRH (*(volatile unsigned char *)0xFFF1F)
|
||||
#define PM1 (*(volatile union un_pm1 *)0xFFF21).pm1
|
||||
#define PM1_bit (*(volatile union un_pm1 *)0xFFF21).BIT
|
||||
#define PM2 (*(volatile union un_pm2 *)0xFFF22).pm2
|
||||
#define PM2_bit (*(volatile union un_pm2 *)0xFFF22).BIT
|
||||
#define PM4 (*(volatile union un_pm4 *)0xFFF24).pm4
|
||||
#define PM4_bit (*(volatile union un_pm4 *)0xFFF24).BIT
|
||||
#define PM6 (*(volatile union un_pm6 *)0xFFF26).pm6
|
||||
#define PM6_bit (*(volatile union un_pm6 *)0xFFF26).BIT
|
||||
#define ADM0 (*(volatile union un_adm0 *)0xFFF30).adm0
|
||||
#define ADM0_bit (*(volatile union un_adm0 *)0xFFF30).BIT
|
||||
#define ADS (*(volatile union un_ads *)0xFFF31).ads
|
||||
#define ADS_bit (*(volatile union un_ads *)0xFFF31).BIT
|
||||
#define ADM1 (*(volatile union un_adm1 *)0xFFF32).adm1
|
||||
#define ADM1_bit (*(volatile union un_adm1 *)0xFFF32).BIT
|
||||
#define KRCTL (*(volatile union un_krctl *)0xFFF34).krctl
|
||||
#define KRCTL_bit (*(volatile union un_krctl *)0xFFF34).BIT
|
||||
#define KRF (*(volatile unsigned char *)0xFFF35)
|
||||
#define KRM0 (*(volatile union un_krm0 *)0xFFF37).krm0
|
||||
#define KRM0_bit (*(volatile union un_krm0 *)0xFFF37).BIT
|
||||
#define EGP0 (*(volatile union un_egp0 *)0xFFF38).egp0
|
||||
#define EGP0_bit (*(volatile union un_egp0 *)0xFFF38).BIT
|
||||
#define EGN0 (*(volatile union un_egn0 *)0xFFF39).egn0
|
||||
#define EGN0_bit (*(volatile union un_egn0 *)0xFFF39).BIT
|
||||
#define IICA0 (*(volatile unsigned char *)0xFFF50)
|
||||
#define IICS0 (*(volatile union un_iics0 *)0xFFF51).iics0
|
||||
#define IICS0_bit (*(volatile union un_iics0 *)0xFFF51).BIT
|
||||
#define IICF0 (*(volatile union un_iicf0 *)0xFFF52).iicf0
|
||||
#define IICF0_bit (*(volatile union un_iicf0 *)0xFFF52).BIT
|
||||
#define TDR02 (*(volatile unsigned short *)0xFFF64)
|
||||
#define TDR03 (*(volatile unsigned short *)0xFFF66)
|
||||
#define TDR03L (*(volatile unsigned char *)0xFFF66)
|
||||
#define TDR03H (*(volatile unsigned char *)0xFFF67)
|
||||
#define ITMC (*(volatile unsigned short *)0xFFF90)
|
||||
#define CMC (*(volatile unsigned char *)0xFFFA0)
|
||||
#define CSC (*(volatile union un_csc *)0xFFFA1).csc
|
||||
#define CSC_bit (*(volatile union un_csc *)0xFFFA1).BIT
|
||||
#define OSTC (*(volatile union un_ostc *)0xFFFA2).ostc
|
||||
#define OSTC_bit (*(volatile union un_ostc *)0xFFFA2).BIT
|
||||
#define OSTS (*(volatile unsigned char *)0xFFFA3)
|
||||
#define CKC (*(volatile union un_ckc *)0xFFFA4).ckc
|
||||
#define CKC_bit (*(volatile union un_ckc *)0xFFFA4).BIT
|
||||
#define CKS0 (*(volatile union un_cks0 *)0xFFFA5).cks0
|
||||
#define CKS0_bit (*(volatile union un_cks0 *)0xFFFA5).BIT
|
||||
#define RESF (*(volatile unsigned char *)0xFFFA8)
|
||||
#define LVIM (*(volatile union un_lvim *)0xFFFA9).lvim
|
||||
#define LVIM_bit (*(volatile union un_lvim *)0xFFFA9).BIT
|
||||
#define LVIS (*(volatile union un_lvis *)0xFFFAA).lvis
|
||||
#define LVIS_bit (*(volatile union un_lvis *)0xFFFAA).BIT
|
||||
#define WDTE (*(volatile unsigned char *)0xFFFAB)
|
||||
#define CRCIN (*(volatile unsigned char *)0xFFFAC)
|
||||
#define DSA0 (*(volatile unsigned char *)0xFFFB0)
|
||||
#define DSA1 (*(volatile unsigned char *)0xFFFB1)
|
||||
#define DRA0 (*(volatile unsigned short *)0xFFFB2)
|
||||
#define DRA0L (*(volatile unsigned char *)0xFFFB2)
|
||||
#define DRA0H (*(volatile unsigned char *)0xFFFB3)
|
||||
#define DRA1 (*(volatile unsigned short *)0xFFFB4)
|
||||
#define DRA1L (*(volatile unsigned char *)0xFFFB4)
|
||||
#define DRA1H (*(volatile unsigned char *)0xFFFB5)
|
||||
#define DBC0 (*(volatile unsigned short *)0xFFFB6)
|
||||
#define DBC0L (*(volatile unsigned char *)0xFFFB6)
|
||||
#define DBC0H (*(volatile unsigned char *)0xFFFB7)
|
||||
#define DBC1 (*(volatile unsigned short *)0xFFFB8)
|
||||
#define DBC1L (*(volatile unsigned char *)0xFFFB8)
|
||||
#define DBC1H (*(volatile unsigned char *)0xFFFB9)
|
||||
#define DMC0 (*(volatile union un_dmc0 *)0xFFFBA).dmc0
|
||||
#define DMC0_bit (*(volatile union un_dmc0 *)0xFFFBA).BIT
|
||||
#define DMC1 (*(volatile union un_dmc1 *)0xFFFBB).dmc1
|
||||
#define DMC1_bit (*(volatile union un_dmc1 *)0xFFFBB).BIT
|
||||
#define DRC0 (*(volatile union un_drc0 *)0xFFFBC).drc0
|
||||
#define DRC0_bit (*(volatile union un_drc0 *)0xFFFBC).BIT
|
||||
#define DRC1 (*(volatile union un_drc1 *)0xFFFBD).drc1
|
||||
#define DRC1_bit (*(volatile union un_drc1 *)0xFFFBD).BIT
|
||||
#define IF0 (*(volatile union un_if0 *)0xFFFE0).if0
|
||||
#define IF0_bit (*(volatile union un_if0 *)0xFFFE0).BIT
|
||||
#define IF0L (*(volatile union un_if0l *)0xFFFE0).if0l
|
||||
#define IF0L_bit (*(volatile union un_if0l *)0xFFFE0).BIT
|
||||
#define IF0H (*(volatile union un_if0h *)0xFFFE1).if0h
|
||||
#define IF0H_bit (*(volatile union un_if0h *)0xFFFE1).BIT
|
||||
#define IF1 (*(volatile union un_if1 *)0xFFFE2).if1
|
||||
#define IF1_bit (*(volatile union un_if1 *)0xFFFE2).BIT
|
||||
#define IF1L (*(volatile union un_if1l *)0xFFFE2).if1l
|
||||
#define IF1L_bit (*(volatile union un_if1l *)0xFFFE2).BIT
|
||||
#define MK0 (*(volatile union un_mk0 *)0xFFFE4).mk0
|
||||
#define MK0_bit (*(volatile union un_mk0 *)0xFFFE4).BIT
|
||||
#define MK0L (*(volatile union un_mk0l *)0xFFFE4).mk0l
|
||||
#define MK0L_bit (*(volatile union un_mk0l *)0xFFFE4).BIT
|
||||
#define MK0H (*(volatile union un_mk0h *)0xFFFE5).mk0h
|
||||
#define MK0H_bit (*(volatile union un_mk0h *)0xFFFE5).BIT
|
||||
#define MK1 (*(volatile union un_mk1 *)0xFFFE6).mk1
|
||||
#define MK1_bit (*(volatile union un_mk1 *)0xFFFE6).BIT
|
||||
#define MK1L (*(volatile union un_mk1l *)0xFFFE6).mk1l
|
||||
#define MK1L_bit (*(volatile union un_mk1l *)0xFFFE6).BIT
|
||||
#define PR00 (*(volatile union un_pr00 *)0xFFFE8).pr00
|
||||
#define PR00_bit (*(volatile union un_pr00 *)0xFFFE8).BIT
|
||||
#define PR00L (*(volatile union un_pr00l *)0xFFFE8).pr00l
|
||||
#define PR00L_bit (*(volatile union un_pr00l *)0xFFFE8).BIT
|
||||
#define PR00H (*(volatile union un_pr00h *)0xFFFE9).pr00h
|
||||
#define PR00H_bit (*(volatile union un_pr00h *)0xFFFE9).BIT
|
||||
#define PR01 (*(volatile union un_pr01 *)0xFFFEA).pr01
|
||||
#define PR01_bit (*(volatile union un_pr01 *)0xFFFEA).BIT
|
||||
#define PR01L (*(volatile union un_pr01l *)0xFFFEA).pr01l
|
||||
#define PR01L_bit (*(volatile union un_pr01l *)0xFFFEA).BIT
|
||||
#define PR10 (*(volatile union un_pr10 *)0xFFFEC).pr10
|
||||
#define PR10_bit (*(volatile union un_pr10 *)0xFFFEC).BIT
|
||||
#define PR10L (*(volatile union un_pr10l *)0xFFFEC).pr10l
|
||||
#define PR10L_bit (*(volatile union un_pr10l *)0xFFFEC).BIT
|
||||
#define PR10H (*(volatile union un_pr10h *)0xFFFED).pr10h
|
||||
#define PR10H_bit (*(volatile union un_pr10h *)0xFFFED).BIT
|
||||
#define PR11 (*(volatile union un_pr11 *)0xFFFEE).pr11
|
||||
#define PR11_bit (*(volatile union un_pr11 *)0xFFFEE).BIT
|
||||
#define PR11L (*(volatile union un_pr11l *)0xFFFEE).pr11l
|
||||
#define PR11L_bit (*(volatile union un_pr11l *)0xFFFEE).BIT
|
||||
#define MDAL (*(volatile unsigned short *)0xFFFF0)
|
||||
#define MULA (*(volatile unsigned short *)0xFFFF0)
|
||||
#define MDAH (*(volatile unsigned short *)0xFFFF2)
|
||||
#define MULB (*(volatile unsigned short *)0xFFFF2)
|
||||
#define MDBH (*(volatile unsigned short *)0xFFFF4)
|
||||
#define MULOH (*(volatile unsigned short *)0xFFFF4)
|
||||
#define MDBL (*(volatile unsigned short *)0xFFFF6)
|
||||
#define MULOL (*(volatile unsigned short *)0xFFFF6)
|
||||
#define PMC (*(volatile union un_pmc *)0xFFFFE).pmc
|
||||
#define PMC_bit (*(volatile union un_pmc *)0xFFFFE).BIT
|
||||
|
||||
/*
|
||||
Sfr bits
|
||||
*/
|
||||
#define ADCE ADM0_bit.no0
|
||||
#define ADCS ADM0_bit.no7
|
||||
#define SPD0 IICS0_bit.no0
|
||||
#define STD0 IICS0_bit.no1
|
||||
#define ACKD0 IICS0_bit.no2
|
||||
#define TRC0 IICS0_bit.no3
|
||||
#define COI0 IICS0_bit.no4
|
||||
#define EXC0 IICS0_bit.no5
|
||||
#define ALD0 IICS0_bit.no6
|
||||
#define MSTS0 IICS0_bit.no7
|
||||
#define IICRSV0 IICF0_bit.no0
|
||||
#define STCEN0 IICF0_bit.no1
|
||||
#define IICBSY0 IICF0_bit.no6
|
||||
#define STCF0 IICF0_bit.no7
|
||||
#define HIOSTOP CSC_bit.no0
|
||||
#define MSTOP CSC_bit.no7
|
||||
#define MCM0 CKC_bit.no4
|
||||
#define MCS CKC_bit.no5
|
||||
#define PCLOE0 CKS0_bit.no7
|
||||
#define LVIF LVIM_bit.no0
|
||||
#define LVIOMSK LVIM_bit.no1
|
||||
#define LVISEN LVIM_bit.no7
|
||||
#define LVILV LVIS_bit.no0
|
||||
#define LVIMD LVIS_bit.no7
|
||||
#define DWAIT0 DMC0_bit.no4
|
||||
#define DS0 DMC0_bit.no5
|
||||
#define DRS0 DMC0_bit.no6
|
||||
#define STG0 DMC0_bit.no7
|
||||
#define DWAIT1 DMC1_bit.no4
|
||||
#define DS1 DMC1_bit.no5
|
||||
#define DRS1 DMC1_bit.no6
|
||||
#define STG1 DMC1_bit.no7
|
||||
#define DST0 DRC0_bit.no0
|
||||
#define DEN0 DRC0_bit.no7
|
||||
#define DST1 DRC1_bit.no0
|
||||
#define DEN1 DRC1_bit.no7
|
||||
#define WDTIIF IF0L_bit.no0
|
||||
#define LVIIF IF0L_bit.no1
|
||||
#define PIF0 IF0L_bit.no2
|
||||
#define PIF1 IF0L_bit.no3
|
||||
#define PIF2 IF0L_bit.no4
|
||||
#define PIF3 IF0L_bit.no5
|
||||
#define DMAIF0 IF0L_bit.no6
|
||||
#define DMAIF1 IF0L_bit.no7
|
||||
#define CSIIF00 IF0H_bit.no0
|
||||
#define IICIF00 IF0H_bit.no0
|
||||
#define STIF0 IF0H_bit.no0
|
||||
#define CSIIF01 IF0H_bit.no1
|
||||
#define IICIF01 IF0H_bit.no1
|
||||
#define SRIF0 IF0H_bit.no1
|
||||
#define SREIF0 IF0H_bit.no2
|
||||
#define TMIF01H IF0H_bit.no3
|
||||
#define TMIF03H IF0H_bit.no4
|
||||
#define IICAIF0 IF0H_bit.no5
|
||||
#define TMIF00 IF0H_bit.no6
|
||||
#define TMIF01 IF0H_bit.no7
|
||||
#define TMIF02 IF1L_bit.no0
|
||||
#define TMIF03 IF1L_bit.no1
|
||||
#define ADIF IF1L_bit.no2
|
||||
#define TMKAIF IF1L_bit.no3
|
||||
#define KRIF IF1L_bit.no4
|
||||
#define MDIF IF1L_bit.no5
|
||||
#define FLIF IF1L_bit.no6
|
||||
#define WDTIMK MK0L_bit.no0
|
||||
#define LVIMK MK0L_bit.no1
|
||||
#define PMK0 MK0L_bit.no2
|
||||
#define PMK1 MK0L_bit.no3
|
||||
#define PMK2 MK0L_bit.no4
|
||||
#define PMK3 MK0L_bit.no5
|
||||
#define DMAMK0 MK0L_bit.no6
|
||||
#define DMAMK1 MK0L_bit.no7
|
||||
#define CSIMK00 MK0H_bit.no0
|
||||
#define IICMK00 MK0H_bit.no0
|
||||
#define STMK0 MK0H_bit.no0
|
||||
#define CSIMK01 MK0H_bit.no1
|
||||
#define IICMK01 MK0H_bit.no1
|
||||
#define SRMK0 MK0H_bit.no1
|
||||
#define SREMK0 MK0H_bit.no2
|
||||
#define TMMK01H MK0H_bit.no3
|
||||
#define TMMK03H MK0H_bit.no4
|
||||
#define IICAMK0 MK0H_bit.no5
|
||||
#define TMMK00 MK0H_bit.no6
|
||||
#define TMMK01 MK0H_bit.no7
|
||||
#define TMMK02 MK1L_bit.no0
|
||||
#define TMMK03 MK1L_bit.no1
|
||||
#define ADMK MK1L_bit.no2
|
||||
#define TMKAMK MK1L_bit.no3
|
||||
#define KRMK MK1L_bit.no4
|
||||
#define MDMK MK1L_bit.no5
|
||||
#define FLMK MK1L_bit.no6
|
||||
#define WDTIPR0 PR00L_bit.no0
|
||||
#define LVIPR0 PR00L_bit.no1
|
||||
#define PPR00 PR00L_bit.no2
|
||||
#define PPR01 PR00L_bit.no3
|
||||
#define PPR02 PR00L_bit.no4
|
||||
#define PPR03 PR00L_bit.no5
|
||||
#define DMAPR00 PR00L_bit.no6
|
||||
#define DMAPR01 PR00L_bit.no7
|
||||
#define CSIPR000 PR00H_bit.no0
|
||||
#define IICPR000 PR00H_bit.no0
|
||||
#define STPR00 PR00H_bit.no0
|
||||
#define CSIPR001 PR00H_bit.no1
|
||||
#define IICPR001 PR00H_bit.no1
|
||||
#define SRPR00 PR00H_bit.no1
|
||||
#define SREPR00 PR00H_bit.no2
|
||||
#define TMPR001H PR00H_bit.no3
|
||||
#define TMPR003H PR00H_bit.no4
|
||||
#define IICAPR00 PR00H_bit.no5
|
||||
#define TMPR000 PR00H_bit.no6
|
||||
#define TMPR001 PR00H_bit.no7
|
||||
#define TMPR002 PR01L_bit.no0
|
||||
#define TMPR003 PR01L_bit.no1
|
||||
#define ADPR0 PR01L_bit.no2
|
||||
#define TMKAPR0 PR01L_bit.no3
|
||||
#define KRPR0 PR01L_bit.no4
|
||||
#define MDPR0 PR01L_bit.no5
|
||||
#define FLPR0 PR01L_bit.no6
|
||||
#define WDTIPR1 PR10L_bit.no0
|
||||
#define LVIPR1 PR10L_bit.no1
|
||||
#define PPR10 PR10L_bit.no2
|
||||
#define PPR11 PR10L_bit.no3
|
||||
#define PPR12 PR10L_bit.no4
|
||||
#define PPR13 PR10L_bit.no5
|
||||
#define DMAPR10 PR10L_bit.no6
|
||||
#define DMAPR11 PR10L_bit.no7
|
||||
#define CSIPR100 PR10H_bit.no0
|
||||
#define IICPR100 PR10H_bit.no0
|
||||
#define STPR10 PR10H_bit.no0
|
||||
#define CSIPR101 PR10H_bit.no1
|
||||
#define IICPR101 PR10H_bit.no1
|
||||
#define SRPR10 PR10H_bit.no1
|
||||
#define SREPR10 PR10H_bit.no2
|
||||
#define TMPR101H PR10H_bit.no3
|
||||
#define TMPR103H PR10H_bit.no4
|
||||
#define IICAPR10 PR10H_bit.no5
|
||||
#define TMPR100 PR10H_bit.no6
|
||||
#define TMPR101 PR10H_bit.no7
|
||||
#define TMPR102 PR11L_bit.no0
|
||||
#define TMPR103 PR11L_bit.no1
|
||||
#define ADPR1 PR11L_bit.no2
|
||||
#define TMKAPR1 PR11L_bit.no3
|
||||
#define KRPR1 PR11L_bit.no4
|
||||
#define MDPR1 PR11L_bit.no5
|
||||
#define FLPR1 PR11L_bit.no6
|
||||
#define MAA PMC_bit.no0
|
||||
|
||||
/*
|
||||
Interrupt vector addresses
|
||||
*/
|
||||
#define RST_vect 0x0
|
||||
#define INTDBG_vect 0x2
|
||||
#define INTWDTI_vect 0x4
|
||||
#define INTLVI_vect 0x6
|
||||
#define INTP0_vect 0x8
|
||||
#define INTP1_vect 0xA
|
||||
#define INTP2_vect 0xC
|
||||
#define INTP3_vect 0xE
|
||||
#define INTDMA0_vect 0x10
|
||||
#define INTDMA1_vect 0x12
|
||||
#define INTCSI00_vect 0x14
|
||||
#define INTIIC00_vect 0x14
|
||||
#define INTST0_vect 0x14
|
||||
#define INTCSI01_vect 0x16
|
||||
#define INTIIC01_vect 0x16
|
||||
#define INTSR0_vect 0x16
|
||||
#define INTSRE0_vect 0x18
|
||||
#define INTTM01H_vect 0x1A
|
||||
#define INTTM03H_vect 0x1C
|
||||
#define INTIICA0_vect 0x1E
|
||||
#define INTTM00_vect 0x20
|
||||
#define INTTM01_vect 0x22
|
||||
#define INTTM02_vect 0x24
|
||||
#define INTTM03_vect 0x26
|
||||
#define INTAD_vect 0x28
|
||||
#define INTIT_vect 0x2A
|
||||
#define INTKR_vect 0x2C
|
||||
#define INTMD_vect 0x2E
|
||||
#define INTFL_vect 0x30
|
||||
#define BRK_I_vect 0x7E
|
||||
#endif
|
||||
@@ -0,0 +1,335 @@
|
||||
/************************************************************************/
|
||||
/* Header file generated from device file: */
|
||||
/* DR5F1026A.DVF */
|
||||
/* V1.12 (2012/04/03) */
|
||||
/* Copyright(C) 2012 Renesas */
|
||||
/* Tool Version: 4.0.0 */
|
||||
/* Date Generated: 2020/01/17 */
|
||||
/************************************************************************/
|
||||
|
||||
#ifndef __INTRINSIC_FUNCTIONS
|
||||
#define __INTRINSIC_FUNCTIONS
|
||||
|
||||
#define DI() asm("di")
|
||||
#define EI() asm("ei")
|
||||
#define HALT() asm("halt")
|
||||
#define NOP() asm("nop")
|
||||
#define STOP() asm("stop")
|
||||
|
||||
#endif
|
||||
|
||||
#ifndef __IOREG_BIT_STRUCTURES
|
||||
#define __IOREG_BIT_STRUCTURES
|
||||
typedef struct {
|
||||
unsigned char no0 :1;
|
||||
unsigned char no1 :1;
|
||||
unsigned char no2 :1;
|
||||
unsigned char no3 :1;
|
||||
unsigned char no4 :1;
|
||||
unsigned char no5 :1;
|
||||
unsigned char no6 :1;
|
||||
unsigned char no7 :1;
|
||||
} __BITS8;
|
||||
|
||||
typedef struct {
|
||||
unsigned short no0 :1;
|
||||
unsigned short no1 :1;
|
||||
unsigned short no2 :1;
|
||||
unsigned short no3 :1;
|
||||
unsigned short no4 :1;
|
||||
unsigned short no5 :1;
|
||||
unsigned short no6 :1;
|
||||
unsigned short no7 :1;
|
||||
unsigned short no8 :1;
|
||||
unsigned short no9 :1;
|
||||
unsigned short no10 :1;
|
||||
unsigned short no11 :1;
|
||||
unsigned short no12 :1;
|
||||
unsigned short no13 :1;
|
||||
unsigned short no14 :1;
|
||||
unsigned short no15 :1;
|
||||
} __BITS16;
|
||||
|
||||
#endif
|
||||
|
||||
#ifndef IODEFINE_EXT_H
|
||||
#define IODEFINE_EXT_H
|
||||
|
||||
/*
|
||||
IO Registers
|
||||
*/
|
||||
union un_adm2 {
|
||||
unsigned char adm2;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_pu1 {
|
||||
unsigned char pu1;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_pu4 {
|
||||
unsigned char pu4;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_pu12 {
|
||||
unsigned char pu12;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_pim1 {
|
||||
unsigned char pim1;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_pom1 {
|
||||
unsigned char pom1;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_pom4 {
|
||||
unsigned char pom4;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_pmc1 {
|
||||
unsigned char pmc1;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_pmc4 {
|
||||
unsigned char pmc4;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_nfen0 {
|
||||
unsigned char nfen0;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_nfen1 {
|
||||
unsigned char nfen1;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_isc {
|
||||
unsigned char isc;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_dflctl {
|
||||
unsigned char dflctl;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_mduc {
|
||||
unsigned char mduc;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_per0 {
|
||||
unsigned char per0;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_rmc {
|
||||
unsigned char rmc;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_rpectl {
|
||||
unsigned char rpectl;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_se0l {
|
||||
unsigned char se0l;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_ss0l {
|
||||
unsigned char ss0l;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_st0l {
|
||||
unsigned char st0l;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_soe0l {
|
||||
unsigned char soe0l;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_te0l {
|
||||
unsigned char te0l;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_ts0l {
|
||||
unsigned char ts0l;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_tt0l {
|
||||
unsigned char tt0l;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_toe0l {
|
||||
unsigned char toe0l;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_iicctl00 {
|
||||
unsigned char iicctl00;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_iicctl01 {
|
||||
unsigned char iicctl01;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
|
||||
#define ADM2 (*(volatile union un_adm2 *)0xF0010).adm2
|
||||
#define ADM2_bit (*(volatile union un_adm2 *)0xF0010).BIT
|
||||
#define ADUL (*(volatile unsigned char *)0xF0011)
|
||||
#define ADLL (*(volatile unsigned char *)0xF0012)
|
||||
#define ADTES (*(volatile unsigned char *)0xF0013)
|
||||
#define PU1 (*(volatile union un_pu1 *)0xF0031).pu1
|
||||
#define PU1_bit (*(volatile union un_pu1 *)0xF0031).BIT
|
||||
#define PU4 (*(volatile union un_pu4 *)0xF0034).pu4
|
||||
#define PU4_bit (*(volatile union un_pu4 *)0xF0034).BIT
|
||||
#define PU12 (*(volatile union un_pu12 *)0xF003C).pu12
|
||||
#define PU12_bit (*(volatile union un_pu12 *)0xF003C).BIT
|
||||
#define PIM1 (*(volatile union un_pim1 *)0xF0041).pim1
|
||||
#define PIM1_bit (*(volatile union un_pim1 *)0xF0041).BIT
|
||||
#define POM1 (*(volatile union un_pom1 *)0xF0051).pom1
|
||||
#define POM1_bit (*(volatile union un_pom1 *)0xF0051).BIT
|
||||
#define POM4 (*(volatile union un_pom4 *)0xF0054).pom4
|
||||
#define POM4_bit (*(volatile union un_pom4 *)0xF0054).BIT
|
||||
#define PMC1 (*(volatile union un_pmc1 *)0xF0061).pmc1
|
||||
#define PMC1_bit (*(volatile union un_pmc1 *)0xF0061).BIT
|
||||
#define PMC4 (*(volatile union un_pmc4 *)0xF0064).pmc4
|
||||
#define PMC4_bit (*(volatile union un_pmc4 *)0xF0064).BIT
|
||||
#define NFEN0 (*(volatile union un_nfen0 *)0xF0070).nfen0
|
||||
#define NFEN0_bit (*(volatile union un_nfen0 *)0xF0070).BIT
|
||||
#define NFEN1 (*(volatile union un_nfen1 *)0xF0071).nfen1
|
||||
#define NFEN1_bit (*(volatile union un_nfen1 *)0xF0071).BIT
|
||||
#define ISC (*(volatile union un_isc *)0xF0073).isc
|
||||
#define ISC_bit (*(volatile union un_isc *)0xF0073).BIT
|
||||
#define TIS0 (*(volatile unsigned char *)0xF0074)
|
||||
#define ADPC (*(volatile unsigned char *)0xF0076)
|
||||
#define PIOR (*(volatile unsigned char *)0xF0077)
|
||||
#define IAWCTL (*(volatile unsigned char *)0xF0078)
|
||||
#define DFLCTL (*(volatile union un_dflctl *)0xF0090).dflctl
|
||||
#define DFLCTL_bit (*(volatile union un_dflctl *)0xF0090).BIT
|
||||
#define HIOTRM (*(volatile unsigned char *)0xF00A0)
|
||||
#define HOCODIV (*(volatile unsigned char *)0xF00A8)
|
||||
#define TEMPCAL0 (*(volatile unsigned char *)0xF00AC)
|
||||
#define TEMPCAL1 (*(volatile unsigned char *)0xF00AD)
|
||||
#define TEMPCAL2 (*(volatile unsigned char *)0xF00AE)
|
||||
#define TEMPCAL3 (*(volatile unsigned char *)0xF00AF)
|
||||
#define MDCL (*(volatile unsigned short *)0xF00E0)
|
||||
#define MDCH (*(volatile unsigned short *)0xF00E2)
|
||||
#define MDUC (*(volatile union un_mduc *)0xF00E8).mduc
|
||||
#define MDUC_bit (*(volatile union un_mduc *)0xF00E8).BIT
|
||||
#define PER0 (*(volatile union un_per0 *)0xF00F0).per0
|
||||
#define PER0_bit (*(volatile union un_per0 *)0xF00F0).BIT
|
||||
#define OSMC (*(volatile unsigned char *)0xF00F3)
|
||||
#define RMC (*(volatile union un_rmc *)0xF00F4).rmc
|
||||
#define RMC_bit (*(volatile union un_rmc *)0xF00F4).BIT
|
||||
#define RPECTL (*(volatile union un_rpectl *)0xF00F5).rpectl
|
||||
#define RPECTL_bit (*(volatile union un_rpectl *)0xF00F5).BIT
|
||||
#define BCDADJ (*(volatile unsigned char *)0xF00FE)
|
||||
#define SSR00 (*(volatile unsigned short *)0xF0100)
|
||||
#define SSR00L (*(volatile unsigned char *)0xF0100)
|
||||
#define SSR01 (*(volatile unsigned short *)0xF0102)
|
||||
#define SSR01L (*(volatile unsigned char *)0xF0102)
|
||||
#define SIR00 (*(volatile unsigned short *)0xF0108)
|
||||
#define SIR00L (*(volatile unsigned char *)0xF0108)
|
||||
#define SIR01 (*(volatile unsigned short *)0xF010A)
|
||||
#define SIR01L (*(volatile unsigned char *)0xF010A)
|
||||
#define SMR00 (*(volatile unsigned short *)0xF0110)
|
||||
#define SMR01 (*(volatile unsigned short *)0xF0112)
|
||||
#define SCR00 (*(volatile unsigned short *)0xF0118)
|
||||
#define SCR01 (*(volatile unsigned short *)0xF011A)
|
||||
#define SE0 (*(volatile unsigned short *)0xF0120)
|
||||
#define SE0L (*(volatile union un_se0l *)0xF0120).se0l
|
||||
#define SE0L_bit (*(volatile union un_se0l *)0xF0120).BIT
|
||||
#define SS0 (*(volatile unsigned short *)0xF0122)
|
||||
#define SS0L (*(volatile union un_ss0l *)0xF0122).ss0l
|
||||
#define SS0L_bit (*(volatile union un_ss0l *)0xF0122).BIT
|
||||
#define ST0 (*(volatile unsigned short *)0xF0124)
|
||||
#define ST0L (*(volatile union un_st0l *)0xF0124).st0l
|
||||
#define ST0L_bit (*(volatile union un_st0l *)0xF0124).BIT
|
||||
#define SPS0 (*(volatile unsigned short *)0xF0126)
|
||||
#define SPS0L (*(volatile unsigned char *)0xF0126)
|
||||
#define SO0 (*(volatile unsigned short *)0xF0128)
|
||||
#define SOE0 (*(volatile unsigned short *)0xF012A)
|
||||
#define SOE0L (*(volatile union un_soe0l *)0xF012A).soe0l
|
||||
#define SOE0L_bit (*(volatile union un_soe0l *)0xF012A).BIT
|
||||
#define SOL0 (*(volatile unsigned short *)0xF0134)
|
||||
#define SOL0L (*(volatile unsigned char *)0xF0134)
|
||||
#define SSC0 (*(volatile unsigned short *)0xF0138)
|
||||
#define SSC0L (*(volatile unsigned char *)0xF0138)
|
||||
#define TCR00 (*(volatile unsigned short *)0xF0180)
|
||||
#define TCR01 (*(volatile unsigned short *)0xF0182)
|
||||
#define TCR02 (*(volatile unsigned short *)0xF0184)
|
||||
#define TCR03 (*(volatile unsigned short *)0xF0186)
|
||||
#define TMR00 (*(volatile unsigned short *)0xF0190)
|
||||
#define TMR01 (*(volatile unsigned short *)0xF0192)
|
||||
#define TMR02 (*(volatile unsigned short *)0xF0194)
|
||||
#define TMR03 (*(volatile unsigned short *)0xF0196)
|
||||
#define TSR00 (*(volatile unsigned short *)0xF01A0)
|
||||
#define TSR00L (*(volatile unsigned char *)0xF01A0)
|
||||
#define TSR01 (*(volatile unsigned short *)0xF01A2)
|
||||
#define TSR01L (*(volatile unsigned char *)0xF01A2)
|
||||
#define TSR02 (*(volatile unsigned short *)0xF01A4)
|
||||
#define TSR02L (*(volatile unsigned char *)0xF01A4)
|
||||
#define TSR03 (*(volatile unsigned short *)0xF01A6)
|
||||
#define TSR03L (*(volatile unsigned char *)0xF01A6)
|
||||
#define TE0 (*(volatile unsigned short *)0xF01B0)
|
||||
#define TE0L (*(volatile union un_te0l *)0xF01B0).te0l
|
||||
#define TE0L_bit (*(volatile union un_te0l *)0xF01B0).BIT
|
||||
#define TS0 (*(volatile unsigned short *)0xF01B2)
|
||||
#define TS0L (*(volatile union un_ts0l *)0xF01B2).ts0l
|
||||
#define TS0L_bit (*(volatile union un_ts0l *)0xF01B2).BIT
|
||||
#define TT0 (*(volatile unsigned short *)0xF01B4)
|
||||
#define TT0L (*(volatile union un_tt0l *)0xF01B4).tt0l
|
||||
#define TT0L_bit (*(volatile union un_tt0l *)0xF01B4).BIT
|
||||
#define TPS0 (*(volatile unsigned short *)0xF01B6)
|
||||
#define TO0 (*(volatile unsigned short *)0xF01B8)
|
||||
#define TO0L (*(volatile unsigned char *)0xF01B8)
|
||||
#define TOE0 (*(volatile unsigned short *)0xF01BA)
|
||||
#define TOE0L (*(volatile union un_toe0l *)0xF01BA).toe0l
|
||||
#define TOE0L_bit (*(volatile union un_toe0l *)0xF01BA).BIT
|
||||
#define TOL0 (*(volatile unsigned short *)0xF01BC)
|
||||
#define TOL0L (*(volatile unsigned char *)0xF01BC)
|
||||
#define TOM0 (*(volatile unsigned short *)0xF01BE)
|
||||
#define TOM0L (*(volatile unsigned char *)0xF01BE)
|
||||
#define IICCTL00 (*(volatile union un_iicctl00 *)0xF0230).iicctl00
|
||||
#define IICCTL00_bit (*(volatile union un_iicctl00 *)0xF0230).BIT
|
||||
#define IICCTL01 (*(volatile union un_iicctl01 *)0xF0231).iicctl01
|
||||
#define IICCTL01_bit (*(volatile union un_iicctl01 *)0xF0231).BIT
|
||||
#define IICWL0 (*(volatile unsigned char *)0xF0232)
|
||||
#define IICWH0 (*(volatile unsigned char *)0xF0233)
|
||||
#define SVA0 (*(volatile unsigned char *)0xF0234)
|
||||
#define CRCD (*(volatile unsigned short *)0xF02FA)
|
||||
|
||||
/*
|
||||
Sfr bits
|
||||
*/
|
||||
#define ADTYP ADM2_bit.no0
|
||||
#define AWC ADM2_bit.no2
|
||||
#define ADRCK ADM2_bit.no3
|
||||
#define DFLEN DFLCTL_bit.no0
|
||||
#define DIVST MDUC_bit.no0
|
||||
#define MACSF MDUC_bit.no1
|
||||
#define MACOF MDUC_bit.no2
|
||||
#define MDSM MDUC_bit.no3
|
||||
#define MACMODE MDUC_bit.no6
|
||||
#define DIVMODE MDUC_bit.no7
|
||||
#define TAU0EN PER0_bit.no0
|
||||
#define SAU0EN PER0_bit.no2
|
||||
#define IICA0EN PER0_bit.no4
|
||||
#define ADCEN PER0_bit.no5
|
||||
#define TMKAEN PER0_bit.no7
|
||||
#define WDVOL RMC_bit.no7
|
||||
#define RPEF RPECTL_bit.no0
|
||||
#define RPERDIS RPECTL_bit.no7
|
||||
#define SPT0 IICCTL00_bit.no0
|
||||
#define STT0 IICCTL00_bit.no1
|
||||
#define ACKE0 IICCTL00_bit.no2
|
||||
#define WTIM0 IICCTL00_bit.no3
|
||||
#define SPIE0 IICCTL00_bit.no4
|
||||
#define WREL0 IICCTL00_bit.no5
|
||||
#define LREL0 IICCTL00_bit.no6
|
||||
#define IICE0 IICCTL00_bit.no7
|
||||
#define PRS0 IICCTL01_bit.no0
|
||||
#define DFC0 IICCTL01_bit.no2
|
||||
#define SMC0 IICCTL01_bit.no3
|
||||
#define DAD0 IICCTL01_bit.no4
|
||||
#define CLD0 IICCTL01_bit.no5
|
||||
#define WUP0 IICCTL01_bit.no7
|
||||
|
||||
/*
|
||||
Interrupt vector addresses
|
||||
*/
|
||||
#endif
|
||||
@@ -0,0 +1,265 @@
|
||||
MEMORY
|
||||
{
|
||||
VEC : ORIGIN = 0x00, LENGTH = 0x04 /* 0x00000 - 0x00003 */
|
||||
IVEC : ORIGIN = 0x04, LENGTH = 0x80 - 0x04 /* 0x00004 - 0x0007F */
|
||||
CALLT0 : ORIGIN = 0x80, LENGTH = 0x40 /* 0x00080 = 0x000BF */
|
||||
OPT : ORIGIN = 0xC0, LENGTH = 0x04 /* 0x000C0 - 0x000C3 */
|
||||
SEC_ID : ORIGIN = 0xC4, LENGTH = 0x0A /* 0x000C4 - 0x000CD */
|
||||
|
||||
OCDSTAD : ORIGIN = 0xCE, LENGTH = 0xA0 /* 0x000CE - 0x000D7 CA78K0R on chip debugging */
|
||||
OCDROM : ORIGIN = 0x3E00, LENGTH = 0x200 /* 0x03E00 - 0x03FFF CA78K0R on chip debugging */
|
||||
|
||||
ROM : ORIGIN = 0xD8, LENGTH = 0x3E00 -0xD8 /* 0x000D8 - 0x03DFF */
|
||||
|
||||
MIRROR : ORIGIN = 0xF2000, LENGTH = 0x2000 /* 0xF2000 - 0xF3FFF */
|
||||
SADDR : ORIGIN = 0xFFE20, LENGTH = 0x0100 /* 0xFFE20 - 0xFFF1F */
|
||||
SELFRAM : ORIGIN = 0xFF900, LENGTH = 136
|
||||
RAM : ORIGIN = 0xFF988, LENGTH = 0xFFE20 -0xFF988 /* 0xFF988 - 0xFFE1F */
|
||||
}
|
||||
|
||||
EXTERN(_Option_Bytes _Security_Id _Debug_Monitor _HardwareVectors _Vectors)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.vec 0x0: AT(0x0)
|
||||
{
|
||||
KEEP(*(.vec))
|
||||
} > VEC
|
||||
.vects 0x4: AT(0x4)
|
||||
{
|
||||
KEEP(*(.vects))
|
||||
} > IVEC
|
||||
|
||||
.callt0 0x80 : AT(0x80)
|
||||
{
|
||||
. = ALIGN(2);
|
||||
KEEP(*(.callt0))
|
||||
} > CALLT0
|
||||
|
||||
.option_byte 0xC0 : AT(0xC0)
|
||||
{
|
||||
KEEP(*(.option_bytes))
|
||||
} > OPT
|
||||
|
||||
.security_id 0xC4: AT(0xC4)
|
||||
{
|
||||
KEEP(*(.security_id))
|
||||
} > SEC_ID
|
||||
|
||||
.debug_monitor 0xCE : AT(0xCE)
|
||||
{
|
||||
KEEP(*(.debug_monitor))
|
||||
} > OCDSTAD
|
||||
|
||||
.lowtext 0xD8: AT(0xD8)
|
||||
{
|
||||
*(.plt)
|
||||
*(.lowtext)
|
||||
} > ROM
|
||||
|
||||
__mdata = .;
|
||||
|
||||
.init :
|
||||
{
|
||||
KEEP(*(.init))
|
||||
} > ROM
|
||||
|
||||
.fini :
|
||||
{
|
||||
KEEP(*(.fini))
|
||||
} > ROM
|
||||
|
||||
PROVIDE(__rodata_limit = CONSTANT(MIRRORAREASTART)+0x2000 + LENGTH(MIRROR));
|
||||
|
||||
/* The rodata section is placed in MIRROR area in order to access as near addressing. */
|
||||
.rodata MAX(., (CONSTANT(MIRRORAREASTART)+0x2000)):
|
||||
{
|
||||
. = ALIGN(2);
|
||||
__rodata = .;
|
||||
*(.rodata)
|
||||
*(.rodata.*)
|
||||
. = ALIGN(2);
|
||||
*(.const)
|
||||
*(.const.*)
|
||||
|
||||
. = ALIGN(2);
|
||||
PROVIDE(__init_array_start = .);
|
||||
KEEP(*(SORT(.init_array.*)))
|
||||
KEEP(*(.init_array))
|
||||
PROVIDE(__init_array_end = .);
|
||||
PROVIDE(__fini_array_start = .);
|
||||
KEEP(*(.fini_array))
|
||||
KEEP(*(SORT(.fini_array.*)))
|
||||
PROVIDE(__fini_array_end = .);
|
||||
__erodata = .;
|
||||
/*The rodata section is copied into the MIRROR area, that is why we check if the start and end addresses for rodata are less then _rodata_limit*/
|
||||
ASSERT((SIZEOF (.rodata) == 0) || (__rodata < __rodata_limit), "Error: rodata section start address is too large. Move the text section after the rodata section to ensure that correct data is added to the MIRROR area.");
|
||||
ASSERT((SIZEOF (.rodata) == 0) || (__erodata <= __rodata_limit), "Error: rodata section size exceeds length of the MIRROR area.");
|
||||
|
||||
}>ROM
|
||||
|
||||
.text (. + __romdatacopysize) :
|
||||
{
|
||||
. = ALIGN(2);
|
||||
*(mfdl)
|
||||
|
||||
. = ALIGN(2);
|
||||
*(PFDL_COD)
|
||||
*(PFDL_COD.*)
|
||||
|
||||
. = ALIGN(2);
|
||||
*(.text)
|
||||
*(.text.*)
|
||||
/*INPUT_SECTION_FLAGS(SHF_EXECINSTR) *(*_n)*/
|
||||
} >ROM AT>ROM
|
||||
|
||||
.textf :
|
||||
{
|
||||
*(.textf)
|
||||
*(.textf.*)
|
||||
/*INPUT_SECTION_FLAGS(SHF_EXECINSTR) *(*_f)*/
|
||||
}>ROM
|
||||
|
||||
.frodata :
|
||||
{
|
||||
. = ALIGN(2);
|
||||
__frodata = .;
|
||||
*(.frodata)
|
||||
*(.frodata.*)
|
||||
__efrodata = .;
|
||||
|
||||
. = ALIGN(2);
|
||||
__constf = .;
|
||||
*(.constf)
|
||||
*(.constf.*)
|
||||
__econstf = .;
|
||||
} >ROM
|
||||
|
||||
.eh_frame_hdr :
|
||||
{
|
||||
KEEP(*(.eh_frame_hdr))
|
||||
} > ROM
|
||||
.eh_frame :
|
||||
{
|
||||
KEEP(*(.eh_frame))
|
||||
} > ROM
|
||||
|
||||
.data 0xFFC8A : AT(__mdata)
|
||||
{
|
||||
. = ALIGN(2);
|
||||
PROVIDE (__datastart = .);
|
||||
__data = .;
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
. = ALIGN(2);
|
||||
/*INPUT_SECTION_FLAGS(!SHF_EXECINSTR, SHF_WRITE, SHF_ALLOC) *(*_n)*/
|
||||
__edata = .;
|
||||
} >RAM
|
||||
|
||||
|
||||
PROVIDE(__romdatastart = LOADADDR(.data));
|
||||
PROVIDE (__romdatacopysize = SIZEOF(.data));
|
||||
|
||||
|
||||
.dataf : {
|
||||
. = ALIGN(2);
|
||||
PROVIDE (__datafstart = .);
|
||||
. = ALIGN(2);
|
||||
*(.dataf)
|
||||
*(.dataf.*)
|
||||
/*INPUT_SECTION_FLAGS(!SHF_EXECINSTR, SHF_WRITE, SHF_ALLOC) *(*_f)*/
|
||||
. = ALIGN(2);
|
||||
PROVIDE (__datafend = .);
|
||||
} > RAM AT> ROM
|
||||
PROVIDE(__romdatafstart = LOADADDR(.dataf));
|
||||
PROVIDE (__romdatafcopysize = SIZEOF(.dataf));
|
||||
|
||||
|
||||
.sdata : {
|
||||
. = ALIGN(2);
|
||||
PROVIDE (__sdatastart = .);
|
||||
*(.sdata)
|
||||
*(.sdata.*)
|
||||
. = ALIGN(2);
|
||||
PROVIDE (__sdataend = .);
|
||||
} > SADDR AT> ROM
|
||||
|
||||
/* Note that crt0 assumes this is a multiple of two; all the
|
||||
start/stop symbols are also assumed word-aligned. */
|
||||
PROVIDE(__romsdatastart = LOADADDR(.sdata));
|
||||
PROVIDE (__romsdatacopysize = SIZEOF(.sdata));
|
||||
|
||||
|
||||
.saddr : {
|
||||
|
||||
. = ALIGN(2);
|
||||
PROVIDE (__saddrstart = .);
|
||||
*(.saddr)
|
||||
. = ALIGN(2);
|
||||
|
||||
} >SADDR AT>ROM
|
||||
PROVIDE(__romsaddrstart = LOADADDR(.saddr));
|
||||
PROVIDE (__romsaddrcopysize = SIZEOF(.saddr));
|
||||
|
||||
|
||||
|
||||
.sbss :
|
||||
{
|
||||
PROVIDE(__sbssstart = .);
|
||||
. = ALIGN(2);
|
||||
__sbss = .;
|
||||
*(.sbss)
|
||||
*(.sbss.*)
|
||||
/*INPUT_SECTION_FLAGS(!SHF_EXECINSTR, SHF_WRITE, SHF_ALLOC) *(*_s)*/
|
||||
. = ALIGN(2);
|
||||
*(.sbss_bit)
|
||||
. = ALIGN(2);
|
||||
__esbss = .;
|
||||
|
||||
} >SADDR AT>SADDR
|
||||
PROVIDE(__sbsssize = SIZEOF(.sbss));
|
||||
|
||||
.bss :
|
||||
{
|
||||
PROVIDE(__bssstart = .);
|
||||
. = ALIGN(2);
|
||||
__bss = .;
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
. = ALIGN(2);
|
||||
*(.bss_bit)
|
||||
. = ALIGN(2);
|
||||
*(COMMON)
|
||||
. = ALIGN(2);
|
||||
__ebss = .;
|
||||
} >RAM AT>RAM
|
||||
PROVIDE(__bsssize = SIZEOF(.bss));
|
||||
|
||||
|
||||
.bssf (NOLOAD):
|
||||
{
|
||||
PROVIDE(__bssfstart = .);
|
||||
. = ALIGN(2);
|
||||
*(.bssf)
|
||||
*(.bssf.*)
|
||||
/*INPUT_SECTION_FLAGS(!SHF_EXECINSTR, SHF_WRITE, SHF_ALLOC) *(*_f)*/
|
||||
. = ALIGN(128);
|
||||
__end = .;
|
||||
} >RAM AT>RAM
|
||||
PROVIDE(__bssfsize = SIZEOF(.bssf));
|
||||
|
||||
PROVIDE(__stack_size = 0x64);
|
||||
.stack 0xFFE20 (NOLOAD) : AT(0xFFE20)
|
||||
{
|
||||
|
||||
PROVIDE(__stack = .);
|
||||
ASSERT((__stack > (__end + __stack_size)), "Error: Too much data - no room left for the stack");
|
||||
} >RAM
|
||||
|
||||
/DISCARD/ :
|
||||
{
|
||||
*(.note)
|
||||
*(.note.*)
|
||||
*(.gnu.warning*)
|
||||
}
|
||||
}
|
||||
@@ -0,0 +1,254 @@
|
||||
/************************************************************************/
|
||||
/* File Version: V1.10d */
|
||||
/* Date Generated: 03/17/2025 */
|
||||
/************************************************************************/
|
||||
|
||||
/*reset_program.asm*/
|
||||
|
||||
#ifdef CPPAPP
|
||||
___dso_handle:
|
||||
.global ___dso_handle
|
||||
#endif
|
||||
|
||||
#if __clang_major__ <= 10
|
||||
;; If you are using LLVM RL V10.0.0.202301 to V10.0.0.202312, please comment out the following three lines.
|
||||
#define HIGHW(x) %hi16(x)
|
||||
#define LOWW(x) x
|
||||
#define LOW(x) x
|
||||
#endif
|
||||
|
||||
.extern _HardwareSetup /*! external Sub-routine to initialise Hardware*/
|
||||
.extern __data
|
||||
.extern __mdata
|
||||
.extern __ebss
|
||||
.extern __bss
|
||||
.extern __edata
|
||||
.extern _main
|
||||
.extern __stack
|
||||
|
||||
.text
|
||||
|
||||
.global _PowerON_Reset /*! global Start routine */
|
||||
.type _PowerON_Reset,@function
|
||||
/* call to _PowerON_Reset */
|
||||
_PowerON_Reset:
|
||||
/* initialise user stack pointer */
|
||||
movw sp,#__stack /* Set stack pointer */
|
||||
|
||||
|
||||
/* load data section from ROM to RAM */
|
||||
;; block move to initialize .data
|
||||
|
||||
mov es, #LOW(HIGHW(__romdatastart))
|
||||
movw bc, #LOWW(__romdatacopysize)
|
||||
1:
|
||||
movw ax, bc
|
||||
cmpw ax, #0
|
||||
bz $1f
|
||||
decw bc
|
||||
decw bc
|
||||
movw ax, es:LOWW(__romdatastart)[bc]
|
||||
movw LOWW(__datastart)[bc], ax
|
||||
br $1b
|
||||
|
||||
;; if you used variables having initial value (far) then you would have to uncomment this.
|
||||
;; For example: char __far variable = 1;
|
||||
;1:
|
||||
; mov es, #LOW(HIGHW(__romdatafstart))
|
||||
; movw bc, #LOWW(__romdatafcopysize)
|
||||
;1:
|
||||
; movw ax, bc
|
||||
; cmpw ax, #0
|
||||
; bz $1f
|
||||
; decw bc
|
||||
; decw bc
|
||||
; movw ax, es:LOWW(__romdatafstart)[bc]
|
||||
; movw LOWW(__datafstart)[bc], ax
|
||||
; br $1b
|
||||
|
||||
1:
|
||||
mov es, #LOW(HIGHW(__romsdatastart))
|
||||
movw bc, #LOWW(__romsdatacopysize)
|
||||
1:
|
||||
movw ax, bc
|
||||
cmpw ax, #0
|
||||
bz $1f
|
||||
decw bc
|
||||
decw bc
|
||||
movw ax, es:LOWW(__romsdatastart)[bc]
|
||||
movw LOWW(__sdatastart)[bc], ax
|
||||
br $1b
|
||||
|
||||
;; block fill to .sbss
|
||||
1:
|
||||
#ifdef __OPTIMIZE_SIZE__
|
||||
movw de, #LOWW(__sbsssize)
|
||||
movw ax, #LOWW(__sbssstart)
|
||||
clrw bc
|
||||
call !!_memset
|
||||
#else
|
||||
movw bc, #LOWW(__sbsssize)
|
||||
clrw ax
|
||||
cmpw ax, bc
|
||||
bz $_sbss_zero_done
|
||||
1:
|
||||
decw bc
|
||||
decw bc
|
||||
movw LOWW(__sbssstart)[bc], ax
|
||||
cmpw ax, bc
|
||||
bnz $1b
|
||||
|
||||
_sbss_zero_done:
|
||||
#endif
|
||||
|
||||
;; block fill to .bss
|
||||
|
||||
#ifdef __OPTIMIZE_SIZE__
|
||||
movw de, #LOWW(__bsssize)
|
||||
movw ax, #LOWW(__bssstart)
|
||||
clrw bc
|
||||
call !!_memset
|
||||
#else
|
||||
movw bc, #LOWW(__bsssize)
|
||||
clrw ax
|
||||
cmpw ax, bc
|
||||
bz $_bss_zero_done
|
||||
1:
|
||||
decw bc
|
||||
decw bc
|
||||
movw LOWW(__bssstart)[bc], ax
|
||||
cmpw ax, bc
|
||||
bnz $1b
|
||||
|
||||
_bss_zero_done:
|
||||
#endif
|
||||
|
||||
;; block fill to .bssf
|
||||
|
||||
;; if you used variables which doesn't have initial value (far) then you would have to uncomment this'
|
||||
;; For example: char __far variable;
|
||||
;#ifdef __OPTIMIZE_SIZE__
|
||||
; movw de, #LOWW(__bssfsize)
|
||||
; movw ax, #LOWW(__bssfstart)
|
||||
; clrw bc
|
||||
; call !!_memset
|
||||
;#else
|
||||
;1:
|
||||
; movw bc, #LOWW(__bssfsize)
|
||||
; clrw ax
|
||||
; cmpw ax, bc
|
||||
; bz $_bssf_zero_done
|
||||
;1:
|
||||
; decw bc
|
||||
; decw bc
|
||||
; movw LOWW(__bssfstart)[bc], ax
|
||||
; cmpw ax, bc
|
||||
; bnz $1b
|
||||
|
||||
;_bssf_zero_done:
|
||||
;#endif
|
||||
|
||||
call !!__rl78_init
|
||||
|
||||
|
||||
/* call the hardware initialiser */
|
||||
call !!_HardwareSetup
|
||||
nop
|
||||
|
||||
|
||||
/* start user program */
|
||||
|
||||
clrw ax /* argv */
|
||||
clrw bc /* argc */
|
||||
call !!_main
|
||||
|
||||
|
||||
call !!__rl78_fini
|
||||
|
||||
.global _exit
|
||||
.type _exit,@function
|
||||
/* call to exit*/
|
||||
_exit:
|
||||
br $_exit
|
||||
|
||||
|
||||
/* ;; HL = start of list
|
||||
;; DE = end of list
|
||||
;; BC = step direction (+2 or -2)
|
||||
*/
|
||||
.global _rl78_run_init_array
|
||||
.type _rl78_run_init_array,@function
|
||||
_rl78_run_init_array:
|
||||
movw hl, #__init_array_start
|
||||
movw de, #__init_array_end
|
||||
#ifdef __RL78_MEDIUM__
|
||||
movw bc, #4
|
||||
#else
|
||||
movw bc, #2
|
||||
#endif
|
||||
br $_rl78_run_inilist
|
||||
|
||||
.global _rl78_run_fini_array
|
||||
.type _rl78_run_fini_array,@function
|
||||
_rl78_run_fini_array:
|
||||
movw hl, #__fini_array_start
|
||||
movw de, #__fini_array_end
|
||||
#ifdef __RL78_MEDIUM__
|
||||
movw bc, #4
|
||||
#else
|
||||
movw bc, #2
|
||||
#endif
|
||||
/* fall through */
|
||||
|
||||
;; HL = start of list
|
||||
;; DE = end of list
|
||||
;; BC = step direction (+2 or -2)
|
||||
_rl78_run_inilist:
|
||||
next_inilist:
|
||||
movw ax, hl
|
||||
cmpw ax, de
|
||||
bz $done_inilist
|
||||
movw ax, [hl]
|
||||
cmpw ax, #-1
|
||||
bz $skip_inilist
|
||||
cmpw ax, #0
|
||||
bz $skip_inilist
|
||||
push ax
|
||||
push bc
|
||||
push de
|
||||
push hl
|
||||
#ifdef __RL78_MEDIUM__
|
||||
push ax
|
||||
mov a, [hl+2]
|
||||
mov cs, a
|
||||
pop ax
|
||||
#endif
|
||||
call ax
|
||||
pop hl
|
||||
pop de
|
||||
pop bc
|
||||
pop ax
|
||||
skip_inilist:
|
||||
movw ax, hl
|
||||
addw ax, bc
|
||||
movw hl, ax
|
||||
br $next_inilist
|
||||
done_inilist:
|
||||
ret
|
||||
|
||||
|
||||
.global __rl78_init
|
||||
.type __rl78_init,@function
|
||||
__rl78_init:
|
||||
call !!_rl78_run_init_array
|
||||
ret
|
||||
|
||||
|
||||
.global __rl78_fini
|
||||
.type __rl78_fini,@function
|
||||
__rl78_fini:
|
||||
call !!_rl78_run_fini_array
|
||||
ret
|
||||
|
||||
|
||||
.end
|
||||
@@ -0,0 +1,171 @@
|
||||
/************************************************************************/
|
||||
/* Header file generated from device file: */
|
||||
/* DR5F1026A.DVF */
|
||||
/* V1.12 (2012/04/03) */
|
||||
/* Copyright(C) 2012 Renesas */
|
||||
/* Tool Version: 4.0.16 */
|
||||
/* Date Generated: 2025/02/05 */
|
||||
/************************************************************************/
|
||||
#include "interrupt_handlers.h"
|
||||
|
||||
extern void isr_tmr0(void);
|
||||
extern void isr_tmr1(void);
|
||||
|
||||
extern void iic_isr( void);
|
||||
|
||||
extern void PowerON_Reset (void);
|
||||
|
||||
const unsigned char Option_Bytes[] __attribute__ ((section (".option_bytes"))) =
|
||||
{
|
||||
0xef, // Disable WDT
|
||||
0x7f, // LVD reset mode 2.81 V
|
||||
0xe0, // HS mode: HOCO @ 24 MHZ (High-speed OnChip Oscillator)
|
||||
0x84 // Enable OCD, erase flash memory on authentication failure
|
||||
};
|
||||
|
||||
const unsigned char Security_Id[] __attribute__ ((section (".security_id"))) = {
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
const unsigned char Debug_Monitor[] __attribute__ ((section (".debug_monitor"))) = {
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
|
||||
};
|
||||
|
||||
#define VEC __attribute__ ((section (".vec")))
|
||||
const void __near *HardwareVectors[] VEC =
|
||||
{
|
||||
PowerON_Reset, // power on reset
|
||||
(void*)0xFFFF // reserved for debugging
|
||||
};
|
||||
|
||||
#define VECT_SECT __attribute__ ((section (".vects")))
|
||||
const void __near *Vectors[] VECT_SECT = {
|
||||
//INT_WDTI (0x4)
|
||||
INT_WDTI,
|
||||
//INT_LVI (0x6)
|
||||
INT_LVI,
|
||||
//INT_P0 (0x8)
|
||||
INT_P0,
|
||||
//INT_P1 (0xA)
|
||||
INT_P1,
|
||||
//INT_P2 (0xC)
|
||||
INT_P2,
|
||||
//INT_P3 (0xE)
|
||||
INT_P3,
|
||||
//INT_DMA0 (0x10)
|
||||
INT_DMA0,
|
||||
//INT_DMA1 (0x12)
|
||||
INT_DMA1,
|
||||
//INT_CSI00/INT_IIC00/INT_ST0 (0x14)
|
||||
INT_ST0,
|
||||
//INT_CSI01/INT_IIC01/INT_SR0 (0x16)
|
||||
INT_SR0,
|
||||
//INT_SRE0 (0x18)
|
||||
INT_SRE0,
|
||||
//INT_TM01H (0x1A)
|
||||
INT_TM01H,
|
||||
//INT_TM03H (0x1C)
|
||||
INT_TM03H,
|
||||
//INT_IICA0 (0x1E)
|
||||
iic_isr,
|
||||
|
||||
//INT_TM00 (0x20)
|
||||
isr_tmr0,
|
||||
|
||||
//INT_TM01 (0x22)
|
||||
isr_tmr1,
|
||||
|
||||
//INT_TM02 (0x24)
|
||||
INT_TM02,
|
||||
//INT_TM03 (0x26)
|
||||
INT_TM03,
|
||||
//INT_AD (0x28)
|
||||
INT_AD,
|
||||
//INT_IT (0x2A)
|
||||
INT_IT,
|
||||
//INT_KR (0x2C)
|
||||
INT_KR,
|
||||
//INT_MD (0x2E)
|
||||
INT_MD,
|
||||
//INT_FL (0x30)
|
||||
INT_FL,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
// Padding
|
||||
(void*)0xFFFF,
|
||||
//INT_BRK_I (0x7E)
|
||||
INT_BRK_I,
|
||||
};
|
||||
|
||||
@@ -0,0 +1,7 @@
|
||||
#ifndef __DVM_CLK_H__
|
||||
#define __DVM_CLK_H__
|
||||
|
||||
void dvm_clk_init( void);
|
||||
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,18 @@
|
||||
#ifndef __DVM_TMR_H__
|
||||
#define __DVM_TMR_H__
|
||||
|
||||
|
||||
|
||||
typedef void (*tmr_cb)(void);
|
||||
|
||||
void dvm_tmr_init(void);
|
||||
|
||||
void dvm_tmr0_start( void);
|
||||
void dvm_tmr0_stop( void);
|
||||
|
||||
|
||||
void dvm_tmr1_start( void);
|
||||
void dvm_tmr1_stop( void);
|
||||
unsigned long dvm_tmr1_count( void);
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,16 @@
|
||||
#ifndef __DVM_TOOLS_H__
|
||||
#define __DVM_TOOLS_H__
|
||||
|
||||
#include <dvm_types.h>
|
||||
|
||||
int config_read( config *cfg);
|
||||
void config_write(config *cfg);
|
||||
|
||||
double scan35( unsigned char *b);
|
||||
short scan4( unsigned char *b);
|
||||
|
||||
void print35( unsigned char *buf, double val, unsigned char supress_zero);
|
||||
void printS35( unsigned char *buf, unsigned char sign, double val, unsigned char supress_zero);
|
||||
|
||||
void print4( unsigned char *buf, short val);
|
||||
#endif
|
||||
@@ -0,0 +1,19 @@
|
||||
#ifndef __DVM_TYPES_H__
|
||||
#define __DVM_TYPES_H__
|
||||
|
||||
typedef unsigned char u08;
|
||||
typedef unsigned short u16;
|
||||
|
||||
typedef struct _config
|
||||
{
|
||||
u16 pre; // preamble 0x2849
|
||||
|
||||
double vref; // reference voltage value
|
||||
double div10; // divider 10 real ratio
|
||||
double div100; // divider 100 real ration
|
||||
short delay; // comparator and other delay fix in timer clicks (8)
|
||||
|
||||
u16 post; // postamble 0x2849
|
||||
} config ;
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,312 @@
|
||||
#ifndef __IODEFINE_INC__
|
||||
#define __IODEFINE_INC__
|
||||
|
||||
#define P1 0xFFF01
|
||||
#define P2 0xFFF02
|
||||
#define P4 0xFFF04
|
||||
#define P6 0xFFF06
|
||||
#define P12 0xFFF0C
|
||||
#define P13 0xFFF0D
|
||||
|
||||
#define SDR00 0xFFF10
|
||||
#define SIO00 0xFFF10
|
||||
#define TXD0 0xFFF10
|
||||
#define SDR01 0xFFF12
|
||||
#define RXD0 0xFFF12
|
||||
#define SIO01 0xFFF12
|
||||
#define TDR00 0xFFF18
|
||||
#define TDR01 0xFFF1A
|
||||
#define TDR01L 0xFFF1A
|
||||
#define TDR01H 0xFFF1B
|
||||
#define ADCR 0xFFF1E
|
||||
#define ADCRH 0xFFF1F
|
||||
|
||||
#define PM1 0xFFF21
|
||||
#define PM2 0xFFF22
|
||||
#define PM4 0xFFF24
|
||||
#define PM6 0xFFF26
|
||||
|
||||
#define ADM0 0xFFF30
|
||||
#define ADS 0xFFF31
|
||||
#define ADM1 0xFFF32
|
||||
#define KRCTL 0xFFF34
|
||||
#define KRF 0xFFF35
|
||||
#define KRM0 0xFFF37
|
||||
#define EGP0 0xFFF38
|
||||
#define EGN0 0xFFF39
|
||||
|
||||
#define IICA0 0xFFF50
|
||||
#define IICS0 0xFFF51
|
||||
#define IICF0 0xFFF52
|
||||
|
||||
#define TDR02 0xFFF64
|
||||
#define TDR03 0xFFF66
|
||||
#define TDR03L 0xFFF66
|
||||
#define TDR03H 0xFFF67
|
||||
|
||||
#define ITMC 0xFFF90
|
||||
|
||||
#define CMC 0xFFFA0
|
||||
#define CSC 0xFFFA1
|
||||
|
||||
#define OSTC 0xFFFA2
|
||||
#define OSTS 0xFFFA3
|
||||
|
||||
#define CKC 0xFFFA4
|
||||
#define CKS0 0xFFFA5
|
||||
|
||||
#define RESF 0xFFFA8
|
||||
#define LVIM 0xFFFA9
|
||||
#define LVIS 0xFFFAA
|
||||
#define WDTE 0xFFFAB
|
||||
#define CRCIN 0xFFFAC
|
||||
|
||||
#define DSA0 0xFFFB0
|
||||
#define DSA1 0xFFFB1
|
||||
#define DRA0 0xFFFB2
|
||||
#define DRA0L 0xFFFB2
|
||||
#define DRA0H 0xFFFB3
|
||||
#define DRA1 0xFFFB4
|
||||
#define DRA1L 0xFFFB4
|
||||
#define DRA1H 0xFFFB5
|
||||
#define DBC0 0xFFFB6
|
||||
#define DBC0L 0xFFFB6
|
||||
#define DBC0H 0xFFFB7
|
||||
#define DBC1 0xFFFB8
|
||||
#define DBC1L 0xFFFB8
|
||||
#define DBC1H 0xFFFB9
|
||||
#define DMC0 0xFFFBA
|
||||
#define DMC1 0xFFFBB
|
||||
#define DRC0 0xFFFBC
|
||||
#define DRC1 0xFFFBD
|
||||
|
||||
#define IF0 0xFFFE0
|
||||
#define IF0L 0xFFFE0
|
||||
#define IF0H 0xFFFE1
|
||||
#define IF1 0xFFFE2
|
||||
#define IF1L 0xFFFE2
|
||||
|
||||
#define MK0 0xFFFE4
|
||||
#define MK0L 0xFFFE4
|
||||
#define MK0H 0xFFFE5
|
||||
#define MK1 0xFFFE6
|
||||
#define MK1L 0xFFFE6
|
||||
|
||||
#define PR00 0xFFFE8
|
||||
#define PR00L 0xFFFE8
|
||||
#define PR00H 0xFFFE9
|
||||
#define PR01 0xFFFEA
|
||||
#define PR01L 0xFFFEA
|
||||
#define PR10 0xFFFEC
|
||||
#define PR10L 0xFFFEC
|
||||
#define PR10H 0xFFFED
|
||||
#define PR11 0xFFFEE
|
||||
#define PR11L 0xFFFEE
|
||||
|
||||
#define MDAL 0xFFFF0
|
||||
#define MULA 0xFFFF0
|
||||
#define MDAH 0xFFFF2
|
||||
#define MULB 0xFFFF2
|
||||
#define MDBH 0xFFFF4
|
||||
#define MULOH 0xFFFF4
|
||||
#define MDBL 0xFFFF6
|
||||
#define MULOL 0xFFFF6
|
||||
#define PMC 0xFFFFE
|
||||
|
||||
// ----------------------------------------------------------------------------
|
||||
// SFR bits
|
||||
// ----------------------------------------------------------------------------
|
||||
// ADM0
|
||||
#define ADCE 0xFFF30.0
|
||||
#define ADCS 0xFFF30.7
|
||||
|
||||
// IICS0
|
||||
#define SPD0 0xFFF51.0
|
||||
#define STD0 0xFFF51.1
|
||||
#define ACKD0 0xFFF51.2
|
||||
#define TRC0 0xFFF51.3
|
||||
#define COI0 0xFFF51.4
|
||||
#define EXC0 0xFFF51.5
|
||||
#define ALD0 0xFFF51.6
|
||||
#define MSTS0 0xFFF51.7
|
||||
|
||||
// IICF0
|
||||
#define IICRSV0 0xFFF52.0
|
||||
#define STCEN0 0xFFF52.1
|
||||
#define IICBSY0 0xFFF52.6
|
||||
#define STCF0 0xFFF52.7
|
||||
|
||||
// CSC
|
||||
#define HIOSTOP 0xFFFA1.0
|
||||
#define MSTOP 0xFFFA1.7
|
||||
|
||||
// CKC
|
||||
#define MCM0 0xFFFA4.4
|
||||
#define MCS 0xFFFA4.5
|
||||
|
||||
// CKS0
|
||||
#define PCLOE0 0xFFFA5.7
|
||||
|
||||
// LVIM
|
||||
#define LVIF 0xFFFA9.0
|
||||
#define LVIOMSK 0xFFFA9.1
|
||||
#define LVISEN 0xFFFA9.7
|
||||
|
||||
// LVIS
|
||||
#define LVILV 0xFFFAA.0
|
||||
#define LVIMD 0xFFFAA.7
|
||||
|
||||
// DMC0
|
||||
#define DWAIT0 0xFFFBA.4
|
||||
#define DS0 0xFFFBA.5
|
||||
#define DRS0 0xFFFBA.6
|
||||
#define STG0 0xFFFBA.7
|
||||
|
||||
// DMC1
|
||||
#define DWAIT1 0xFFFBB.4
|
||||
#define DS1 0xFFFBB.5
|
||||
#define DRS1 0xFFFBB.6
|
||||
#define STG1 0xFFFBB.7
|
||||
|
||||
// DRC0
|
||||
#define DST0 0xFFFBC.0
|
||||
#define DEN0 0xFFFBC.7
|
||||
|
||||
// DRC1
|
||||
#define DST1 0xFFFBD.0
|
||||
#define DEN1 0xFFFBD.7
|
||||
|
||||
// IF0L
|
||||
#define WDTIIF 0xFFFE0.0
|
||||
#define LVIIF 0xFFFE0.1
|
||||
#define PIF0 0xFFFE0.2
|
||||
#define PIF1 0xFFFE0.3
|
||||
#define PIF2 0xFFFE0.4
|
||||
#define PIF3 0xFFFE0.5
|
||||
#define DMAIF0 0xFFFE0.6
|
||||
#define DMAIF1 0xFFFE0.7
|
||||
|
||||
// IF0H
|
||||
#define CSIIF00 0xFFFE1.0
|
||||
#define IICIF00 0xFFFE1.0
|
||||
#define STIF0 0xFFFE1.0
|
||||
#define CSIIF01 0xFFFE1.1
|
||||
#define IICIF01 0xFFFE1.1
|
||||
#define SRIF0 0xFFFE1.1
|
||||
#define SREIF0 0xFFFE1.2
|
||||
#define TMIF01H 0xFFFE1.3
|
||||
#define TMIF03H 0xFFFE1.4
|
||||
#define IICAIF0 0xFFFE1.5
|
||||
#define TMIF00 0xFFFE1.6
|
||||
#define TMIF01 0xFFFE1.7
|
||||
|
||||
// IF1L
|
||||
#define TMIF02 0xFFFE2.0
|
||||
#define TMIF03 0xFFFE2.1
|
||||
#define ADIF 0xFFFE2.2
|
||||
#define TMKAIF 0xFFFE2.3
|
||||
#define KRIF 0xFFFE2.4
|
||||
#define MDIF 0xFFFE2.5
|
||||
#define FLIF 0xFFFE2.6
|
||||
|
||||
// MK0L
|
||||
#define WDTIMK 0xFFFE4.0
|
||||
#define LVIMK 0xFFFE4.1
|
||||
#define PMK0 0xFFFE4.2
|
||||
#define PMK1 0xFFFE4.3
|
||||
#define PMK2 0xFFFE4.4
|
||||
#define PMK3 0xFFFE4.5
|
||||
#define DMAMK0 0xFFFE4.6
|
||||
#define DMAMK1 0xFFFE4.7
|
||||
|
||||
// MK0H
|
||||
#define CSIMK00 0xFFFE5.0
|
||||
#define IICMK00 0xFFFE5.0
|
||||
#define STMK0 0xFFFE5.0
|
||||
#define CSIMK01 0xFFFE5.1
|
||||
#define IICMK01 0xFFFE5.1
|
||||
#define SRMK0 0xFFFE5.1
|
||||
#define SREMK0 0xFFFE5.2
|
||||
#define TMMK01H 0xFFFE5.3
|
||||
#define TMMK03H 0xFFFE5.4
|
||||
#define IICAMK0 0xFFFE5.5
|
||||
#define TMMK00 0xFFFE5.6
|
||||
#define TMMK01 0xFFFE5.7
|
||||
|
||||
// MK1L
|
||||
#define TMMK02 0xFFFE6.0
|
||||
#define TMMK03 0xFFFE6.1
|
||||
#define ADMK 0xFFFE6.2
|
||||
#define TMKAMK 0xFFFE6.3
|
||||
#define KRMK 0xFFFE6.4
|
||||
#define MDMK 0xFFFE6.5
|
||||
#define FLMK 0xFFFE6.6
|
||||
|
||||
// PR00L
|
||||
#define WDTIPR0 0xFFFE8.0
|
||||
#define LVIPR0 0xFFFE8.1
|
||||
#define PPR00 0xFFFE8.2
|
||||
#define PPR01 0xFFFE8.3
|
||||
#define PPR02 0xFFFE8.4
|
||||
#define PPR03 0xFFFE8.5
|
||||
#define DMAPR00 0xFFFE8.6
|
||||
#define DMAPR01 0xFFFE8.7
|
||||
|
||||
// PR00H
|
||||
#define CSIPR000 0xFFFE9.0
|
||||
#define IICPR000 0xFFFE9.0
|
||||
#define STPR00 0xFFFE9.0
|
||||
#define CSIPR001 0xFFFE9.1
|
||||
#define IICPR001 0xFFFE9.1
|
||||
#define SRPR00 0xFFFE9.1
|
||||
#define SREPR00 0xFFFE9.2
|
||||
#define TMPR001H 0xFFFE9.3
|
||||
#define TMPR003H 0xFFFE9.4
|
||||
#define IICAPR00 0xFFFE9.5
|
||||
#define TMPR000 0xFFFE9.6
|
||||
#define TMPR001 0xFFFE9.7
|
||||
|
||||
// PR01L
|
||||
#define TMPR002 0xFFFEA.0
|
||||
#define TMPR003 0xFFFEA.1
|
||||
#define ADPR0 0xFFFEA.2
|
||||
#define TMKAPR0 0xFFFEA.3
|
||||
#define KRPR0 0xFFFEA.4
|
||||
#define MDPR0 0xFFFEA.5
|
||||
#define FLPR0 0xFFFEA.6
|
||||
|
||||
// PR10L
|
||||
#define WDTIPR1 0xFFFEC.0
|
||||
#define LVIPR1 0xFFFEC.1
|
||||
#define PPR10 0xFFFEC.2
|
||||
#define PPR11 0xFFFEC.3
|
||||
#define PPR12 0xFFFEC.4
|
||||
#define PPR13 0xFFFEC.5
|
||||
#define DMAPR10 0xFFFEC.6
|
||||
#define DMAPR11 0xFFFEC.7
|
||||
|
||||
// PR10H
|
||||
#define CSIPR100 0xFFFED.0
|
||||
#define IICPR100 0xFFFED.0
|
||||
#define STPR10 0xFFFED.0
|
||||
#define CSIPR101 0xFFFED.1
|
||||
#define IICPR101 0xFFFED.1
|
||||
#define SRPR10 0xFFFED.1
|
||||
#define SREPR10 0xFFFED.2
|
||||
#define TMPR101H 0xFFFED.3
|
||||
#define TMPR103H 0xFFFED.4
|
||||
#define IICAPR10 0xFFFED.5
|
||||
#define TMPR100 0xFFFED.6
|
||||
#define TMPR101 0xFFFED.7
|
||||
|
||||
// PR11L
|
||||
#define TMPR102 0xFFFEE.0
|
||||
#define TMPR103 0xFFFEE.1
|
||||
#define ADPR1 0xFFFEE.2
|
||||
#define TMKAPR1 0xFFFEE.3
|
||||
#define KRPR1 0xFFFEE.4
|
||||
#define MDPR1 0xFFFEE.5
|
||||
#define FLPR1 0xFFFEE.6
|
||||
|
||||
#define MAA 0xFFFFE.0
|
||||
#endif
|
||||
@@ -0,0 +1,166 @@
|
||||
#ifndef __IODEFINE_EXT_H__
|
||||
#define __IODEFINE_EXT_H__
|
||||
|
||||
#define ADM2 0xF0010
|
||||
#define ADUL 0xF0011
|
||||
#define ADLL 0xF0012
|
||||
#define ADTES 0xF0013
|
||||
|
||||
#define PU1 0xF0031
|
||||
#define PU4 0xF0034
|
||||
#define PU12 0xF003C
|
||||
|
||||
#define PIM1 0xF0041
|
||||
|
||||
#define POM1 0xF0051
|
||||
#define POM4 0xF0054
|
||||
|
||||
#define PMC1 0xF0061
|
||||
#define PMC4 0xF0064
|
||||
|
||||
#define NFEN0 0xF0070
|
||||
#define NFEN1 0xF0071
|
||||
|
||||
#define ISC 0xF0073
|
||||
#define TIS0 0xF0074
|
||||
#define ADPC 0xF0076
|
||||
#define PIOR 0xF0077
|
||||
#define IAWCTL 0xF0078
|
||||
|
||||
#define DFLCTL 0xF0090
|
||||
#define HIOTRM 0xF00A0
|
||||
#define HOCODIV 0xF00A8
|
||||
#define TEMPCAL0 0xF00AC
|
||||
#define TEMPCAL1 0xF00AD
|
||||
#define TEMPCAL2 0xF00AE
|
||||
#define TEMPCAL3 0xF00AF
|
||||
#define MDCL 0xF00E0
|
||||
#define MDCH 0xF00E2
|
||||
#define MDUC 0xF00E8
|
||||
|
||||
#define PER0 0xF00F0
|
||||
#define OSMC 0xF00F3
|
||||
#define RMC 0xF00F4
|
||||
#define RPECTL 0xF00F5
|
||||
#define BCDADJ 0xF00FE
|
||||
#define SSR00 0xF0100
|
||||
#define SSR00L 0xF0100
|
||||
#define SSR01 0xF0102
|
||||
#define SSR01L 0xF0102
|
||||
#define SIR00 0xF0108
|
||||
#define SIR00L 0xF0108
|
||||
#define SIR01 0xF010A
|
||||
#define SIR01L 0xF010A
|
||||
#define SMR00 0xF0110
|
||||
#define SMR01 0xF0112
|
||||
#define SCR00 0xF0118
|
||||
#define SCR01 0xF011A
|
||||
|
||||
#define TCR00 0xF0180
|
||||
#define TCR01 0xF0182
|
||||
#define TCR02 0xF0184
|
||||
#define TCR03 0xF0186
|
||||
|
||||
#define TMR00 0xF0190
|
||||
#define TMR01 0xF0192
|
||||
#define TMR02 0xF0194
|
||||
#define TMR03 0xF0196
|
||||
|
||||
#define TSR00 0xF01A0
|
||||
#define TSR00L 0xF01A0
|
||||
#define TSR01 0xF01A2
|
||||
#define TSR01L 0xF01A2
|
||||
#define TSR02 0xF01A4
|
||||
#define TSR02L 0xF01A4
|
||||
#define TSR03 0xF01A6
|
||||
#define TSR03L 0xF01A6
|
||||
|
||||
#define SE0 0xF0120
|
||||
#define SE0L 0xF0120
|
||||
#define SS0 0xF0122
|
||||
#define SS0L 0xF0122
|
||||
#define ST0 0xF0124
|
||||
#define ST0L 0xF0124
|
||||
#define SPS0 0xF0126
|
||||
#define SPS0L 0xF0126
|
||||
#define SO0 0xF0128
|
||||
#define SOE0 0xF012A
|
||||
#define SOE0L 0xF012A
|
||||
|
||||
#define SOL0 0xF0134
|
||||
#define SOL0L 0xF0134
|
||||
#define SSC0 0xF0138
|
||||
#define SSC0L 0xF0138
|
||||
|
||||
#define TE0 0xF01B0
|
||||
#define TE0L 0xF01B0
|
||||
#define TS0 0xF01B2
|
||||
#define TS0L 0xF01B2
|
||||
#define TT0 0xF01B4
|
||||
#define TT0L 0xF01B4
|
||||
#define TPS0 0xF01B6
|
||||
#define TO0 0xF01B8
|
||||
#define TO0L 0xF01B8
|
||||
#define TOE0 0xF01BA
|
||||
#define TOE0L 0xF01BA
|
||||
#define TOL0 0xF01BC
|
||||
#define TOL0L 0xF01BC
|
||||
#define TOM0 0xF01BE
|
||||
#define TOM0L 0xF01BE
|
||||
|
||||
#define IICCTL00 0xF0230
|
||||
#define IICCTL01 0xF0231
|
||||
#define IICWL0 0xF0232
|
||||
#define IICWH0 0xF0233
|
||||
#define SVA0 0xF0234
|
||||
#define CRCD 0xF02FA
|
||||
|
||||
// ADM2
|
||||
#define ADTYP 0xF0010.0
|
||||
#define AWC 0xF0010.2
|
||||
#define ADRCK 0xF0010.3
|
||||
|
||||
// DFLCTL
|
||||
#define DFLEN 0xF0090.0
|
||||
|
||||
// MDUC
|
||||
#define DIVST 0xF00E8.0
|
||||
#define MACSF 0xF00E8.1
|
||||
#define MACOF 0xF00E8.2
|
||||
#define MDSM 0xF00E8.3
|
||||
#define MACMODE 0xF00E8.6
|
||||
#define DIVMODE 0xF00E8.7
|
||||
|
||||
// PER0
|
||||
#define TAU0EN 0xF00F0.0
|
||||
#define SAU0EN 0xF00F0.2
|
||||
#define IICA0EN 0xF00F0.4
|
||||
#define ADCEN 0xF00F0.5
|
||||
#define TMKAEN 0xF00F0.7
|
||||
|
||||
// RMC
|
||||
#define WDVOL 0xF00F4.7
|
||||
|
||||
// RPECTL
|
||||
#define RPEF 0xF00F5.0
|
||||
#define RPERDIS 0xF00F5.7
|
||||
|
||||
// IICCTL00
|
||||
#define SPT0 0xF0230.0
|
||||
#define STT0 0xF0230.1
|
||||
#define ACKE0 0xF0230.2
|
||||
#define WTIM0 0xF0230.3
|
||||
#define SPIE0 0xF0230.4
|
||||
#define WREL0 0xF0230.5
|
||||
#define LREL0 0xF0230.6
|
||||
#define IICE0 0xF0230.7
|
||||
|
||||
// IICCTL01
|
||||
#define PRS0 0xF0231.0
|
||||
#define DFC0 0xF0231.2
|
||||
#define SMC0 0xF0231.3
|
||||
#define DAD0 0xF0231.4
|
||||
#define CLD0 0xF0231.5
|
||||
#define WUP0 0xF0231.7
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,17 @@
|
||||
#ifndef __MR_FDL_H__
|
||||
#define __MR_FDL_H__
|
||||
|
||||
#include <pfdl.h>
|
||||
#include <pfdl_types.h>
|
||||
|
||||
pfdl_status_t mfdl_handler( void);
|
||||
pfdl_status_t mfdl_open( void);
|
||||
void mfdl_close( void);
|
||||
|
||||
pfdl_status_t mfdl_erase( pfdl_u16 block);
|
||||
pfdl_status_t mfdl_check( pfdl_u16 index, pfdl_u16 length);
|
||||
pfdl_status_t mfdl_verify(pfdl_u16 index, pfdl_u16 length);
|
||||
pfdl_status_t mfdl_read( pfdl_u16 index, pfdl_u16 length, __near pfdl_u08* data);
|
||||
pfdl_status_t mfdl_write( pfdl_u16 index, pfdl_u16 length, __near pfdl_u08* data);
|
||||
|
||||
#endif
|
||||
+121
@@ -0,0 +1,121 @@
|
||||
/**********************************************************************************************************************
|
||||
Program Name : Flash Data Library T04 (PicoFDL)
|
||||
|
||||
File Name : pfdl.h
|
||||
Program Version : V1.05 (for LLVM)
|
||||
Device(s) : RL78/x1x
|
||||
Description : C language API definition of the Flash Data Library
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/**********************************************************************************************************************
|
||||
DISCLAIMER
|
||||
This software is supplied by Renesas Electronics Corporation and is only intended for use with
|
||||
Renesas products. No other uses are authorized. This software is owned by Renesas Electronics
|
||||
Corporation and is protected under all applicable laws, including copyright laws.
|
||||
THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE,
|
||||
WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY,
|
||||
FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
|
||||
TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR
|
||||
ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR
|
||||
CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
|
||||
BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
Renesas reserves the right, without notice, to make changes to this software and to discontinue the
|
||||
availability of this software. By using this software, you agree to the additional terms and conditions
|
||||
found by accessing the following link:
|
||||
http://www.renesas.com/disclaimer
|
||||
|
||||
Copyright (C) 2023 Renesas Electronics Corporation. All rights reserved.
|
||||
**********************************************************************************************************************/
|
||||
|
||||
#ifndef __PFDL_H_INCLUDED
|
||||
#define __PFDL_H_INCLUDED
|
||||
|
||||
|
||||
/*================================================================================================*/
|
||||
/* include files list */
|
||||
/*================================================================================================*/
|
||||
#include "pfdl_types.h"
|
||||
|
||||
|
||||
/* ---------------------------------------------------------------------------------------------------------------*/
|
||||
/* Block type: standard function */
|
||||
/* ---------------------------------------------------------------------------------------------------------------*/
|
||||
/* Purpose: Unconditional activation of the Data Flash Library. */
|
||||
/* Based on the descriptor data: */
|
||||
/* - the flash firmware will be initialized for data-flash access only */
|
||||
/* - the internal timing and low-voltage capability will be configured according to the descriptor */
|
||||
/* After successful initialization the data flash clock is ON and the PFDL is ready to use. */
|
||||
/* */
|
||||
/* CAUTION: */
|
||||
/* Due to the code size minimization no plausibility checks are done by the PicoFDL. */
|
||||
/* Neither configuration, frequency range nor data flash size will be checked by the library. */
|
||||
/* */
|
||||
/* Input: address of the PFDL descriptor variable (RAM only) */
|
||||
/* Output: - */
|
||||
/* Return: PFDL status */
|
||||
/* ---------------------------------------------------------------------------------------------------------------*/
|
||||
extern pfdl_status_t __far PFDL_Open(__near pfdl_descriptor_t* descriptor_pstr) __attribute__ ((section ("PFDL_COD")));
|
||||
|
||||
|
||||
/* ---------------------------------------------------------------------------------------------------------------*/
|
||||
/* Block type: standard function */
|
||||
/* ---------------------------------------------------------------------------------------------------------------*/
|
||||
/* Purpose: Disable data flash access unconditionally. */
|
||||
/* If any command is just executed, PFDL_Close will stop it immediately. */
|
||||
/* After return the data flash clock is switched OFF. */
|
||||
/* Input: - */
|
||||
/* Output: - */
|
||||
/* Return: - */
|
||||
/* ---------------------------------------------------------------------------------------------------------------*/
|
||||
extern void __far PFDL_Close(void) __attribute__ ((section ("PFDL_COD")));
|
||||
|
||||
|
||||
/* ---------------------------------------------------------------------------------------------------------------*/
|
||||
/* Block type: standard function */
|
||||
/* ---------------------------------------------------------------------------------------------------------------*/
|
||||
/* Purpose: Initiating execution of the PFDL request related to the data flash. */
|
||||
/* The corresponding request variable has to be parametrized before. */
|
||||
/* */
|
||||
/* request_pstr->index_u16 : byte-index or block-number within PFDL-pool */
|
||||
/* request_pstr->data_pu08 : start address of the RAM data that should be read/written */
|
||||
/* request_pstr->bytecount_u16 : number of bytes has to be read/written */
|
||||
/* request_pstr->command_enu : command code */
|
||||
/* */
|
||||
/* CAUTION: */
|
||||
/* Due to the code size minimization no plausibility checks are done by the PFDL. */
|
||||
/* */
|
||||
/* Input: &request_pstr - pointer to PFDL request variable */
|
||||
/* Output: - */
|
||||
/* Return: status of the request */
|
||||
/* ---------------------------------------------------------------------------------------------------------------*/
|
||||
extern pfdl_status_t __far PFDL_Execute(__near pfdl_request_t* request_pstr) __attribute__ ((section ("PFDL_COD")));
|
||||
|
||||
|
||||
/* ---------------------------------------------------------------------------------------------------------------*/
|
||||
/* Block type: standard function */
|
||||
/* ---------------------------------------------------------------------------------------------------------------*/
|
||||
/* Purpose: Continuation of command execution and status update of requests being under execution. */
|
||||
/* Input: - */
|
||||
/* Output: - */
|
||||
/* Return: PFDL status = */
|
||||
/* PFDL_IDLE - no request is processed by PFDL, PFDL is ready to receive new requests */
|
||||
/* PFDL_OK - processed request/command finished without problems */
|
||||
/* PFDL_BUSY - request/command is still being processed */
|
||||
/* other - flash or firmware related errors */
|
||||
/* ---------------------------------------------------------------------------------------------------------------*/
|
||||
extern pfdl_status_t __far PFDL_Handler(void) __attribute__ ((section ("PFDL_COD")));
|
||||
|
||||
|
||||
/* ---------------------------------------------------------------------------------------------------------------*/
|
||||
/* Block type: standard function */
|
||||
/* ---------------------------------------------------------------------------------------------------------------*/
|
||||
/* Purpose: Returns the start address of the library version string */
|
||||
/* */
|
||||
/* Input: - */
|
||||
/* Output: - */
|
||||
/* Return: starting address of the zero-terminated version string */
|
||||
/* ---------------------------------------------------------------------------------------------------------------*/
|
||||
extern __far pfdl_u08* __far PFDL_GetVersionString(void) __attribute__ ((section ("PFDL_COD")));
|
||||
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,59 @@
|
||||
/**********************************************************************************************************************
|
||||
Program Name : Flash Data Library T04 (PicoFDL)
|
||||
|
||||
File Name : pfdl_asm.h
|
||||
Program Version : V1.05 (for LLVM)
|
||||
Device(s) : RL78/x1x
|
||||
Description : Preprocessor defines for library usage from assembler
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/**********************************************************************************************************************
|
||||
DISCLAIMER
|
||||
This software is supplied by Renesas Electronics Corporation and is only intended for use with
|
||||
Renesas products. No other uses are authorized. This software is owned by Renesas Electronics
|
||||
Corporation and is protected under all applicable laws, including copyright laws.
|
||||
THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE,
|
||||
WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY,
|
||||
FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
|
||||
TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR
|
||||
ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR
|
||||
CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
|
||||
BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
Renesas reserves the right, without notice, to make changes to this software and to discontinue the
|
||||
availability of this software. By using this software, you agree to the additional terms and conditions
|
||||
found by accessing the following link:
|
||||
http://www.renesas.com/disclaimer
|
||||
|
||||
Copyright (C) 2023 Renesas Electronics Corporation. All rights reserved.
|
||||
**********************************************************************************************************************/
|
||||
|
||||
#ifndef __PFDL_ASM_H_INCLUDED
|
||||
#define __PFDL_ASM_H_INCLUDED
|
||||
|
||||
|
||||
/* PFDL command code set as used for pfdl_command_t */
|
||||
/* ---------------------------------------------- */
|
||||
#define PFDL_CMD_READ_BYTES (0x00) /* 0x00, reads data from flash memory */
|
||||
#define PFDL_CMD_IVERIFY_BYTES (0x06) /* 0x06, verifies data if flash content is stable */
|
||||
#define PFDL_CMD_BLANKCHECK_BYTES (0x08) /* 0x08, checks if flash content is blank */
|
||||
#define PFDL_CMD_WRITE_BYTES (0x04) /* 0x04, writes data into flash memory */
|
||||
#define PFDL_CMD_ERASE_BLOCK (0x03) /* 0x03, erases one flash block */
|
||||
/* ---------------------------------------------- */
|
||||
|
||||
|
||||
/* PFDL error code set as used for pfdl_status_t */
|
||||
|
||||
/* operation related status */ /* ---------------------------------------------- */
|
||||
#define PFDL_IDLE (0x30) /* 0x30, PFDL ready to receive requests */
|
||||
#define PFDL_OK (0x00) /* 0x00, command finished without problems */
|
||||
#define PFDL_BUSY (0xFF) /* 0xFF, command is being processed */
|
||||
/* flash related status */ /* ---------------------------------------------- */
|
||||
#define PFDL_ERR_PROTECTION (0x10) /* 0x10, protection error (access right conflict) */
|
||||
#define PFDL_ERR_ERASE (0x1A) /* 0x1A, erase error */
|
||||
#define PFDL_ERR_MARGIN (0x1B) /* 0x1B, blankcheck or verify margin violated */
|
||||
#define PFDL_ERR_WRITE (0x1C) /* 0x1C, write error */
|
||||
#define PFDL_ERR_PARAMETER (0x05) /* 0x05, parameter error */
|
||||
/* ---------------------------------------------- */
|
||||
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,123 @@
|
||||
/**********************************************************************************************************************
|
||||
Program Name : Flash Data Library T04 (PicoFDL)
|
||||
|
||||
File Name : pfdl_types.h
|
||||
Program Version : V1.05 (for LLVM)
|
||||
Device(s) : RL78/x1x
|
||||
Description : Type definitions used by the library
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/**********************************************************************************************************************
|
||||
DISCLAIMER
|
||||
This software is supplied by Renesas Electronics Corporation and is only intended for use with
|
||||
Renesas products. No other uses are authorized. This software is owned by Renesas Electronics
|
||||
Corporation and is protected under all applicable laws, including copyright laws.
|
||||
THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE,
|
||||
WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY,
|
||||
FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
|
||||
TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR
|
||||
ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR
|
||||
CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
|
||||
BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
Renesas reserves the right, without notice, to make changes to this software and to discontinue the
|
||||
availability of this software. By using this software, you agree to the additional terms and conditions
|
||||
found by accessing the following link:
|
||||
http://www.renesas.com/disclaimer
|
||||
|
||||
Copyright (C) 2023 Renesas Electronics Corporation. All rights reserved.
|
||||
**********************************************************************************************************************/
|
||||
|
||||
#ifndef __PFDL_TYPES_H_INCLUDED
|
||||
#define __PFDL_TYPES_H_INCLUDED
|
||||
|
||||
|
||||
/*==============================================================================================*/
|
||||
/* unsigned type definitions */
|
||||
/*==============================================================================================*/
|
||||
typedef unsigned char pfdl_u08;
|
||||
typedef unsigned int pfdl_u16;
|
||||
typedef unsigned long int pfdl_u32;
|
||||
|
||||
|
||||
/*==============================================================================================*/
|
||||
/* global constant definitions */
|
||||
/*==============================================================================================*/
|
||||
|
||||
|
||||
/*==============================================================================================*/
|
||||
/* global type definitions */
|
||||
/*==============================================================================================*/
|
||||
|
||||
/* PFDL command code set */
|
||||
typedef enum
|
||||
{ /* ---------------------------------------------- */
|
||||
PFDL_CMD_READ_BYTES = (0x00), /* 0x00, reads data from flash memory */
|
||||
PFDL_CMD_IVERIFY_BYTES = (0x06), /* 0x06, verifies data if flash content is stable */
|
||||
PFDL_CMD_BLANKCHECK_BYTES = (0x08), /* 0x08, checks if flash content is blank */
|
||||
PFDL_CMD_WRITE_BYTES = (0x04), /* 0x04, writes data into flash memory */
|
||||
PFDL_CMD_ERASE_BLOCK = (0x03) /* 0x03, erases one flash block */
|
||||
} __attribute__ ((__packed__)) pfdl_command_t; /* ---------------------------------------------- */
|
||||
|
||||
|
||||
/* PFDL error code set */
|
||||
typedef enum
|
||||
{
|
||||
/* operation related status */ /* ---------------------------------------------- */
|
||||
PFDL_IDLE = (0x30), /* 0x30, PFDL ready to receive requests */
|
||||
PFDL_OK = (0x00), /* 0x00, command finished without problems */
|
||||
PFDL_BUSY = (0xFF), /* 0xFF, command is being processed */
|
||||
/* flash related status */ /* ---------------------------------------------- */
|
||||
PFDL_ERR_PROTECTION = (0x10), /* 0x10, protection error (access right conflict) */
|
||||
PFDL_ERR_ERASE = (0x1A), /* 0x1A, erase error */
|
||||
PFDL_ERR_MARGIN = (0x1B), /* 0x1B, blankcheck or verify margin violated */
|
||||
PFDL_ERR_WRITE = (0x1C), /* 0x1C, write error */
|
||||
PFDL_ERR_PARAMETER = (0x05) /* 0x05, parameter error */
|
||||
} __attribute__ ((__packed__)) pfdl_status_t; /* ---------------------------------------------- */
|
||||
|
||||
|
||||
/* PFDL request type (base type for any PFDL access) */
|
||||
typedef struct
|
||||
{ /* ---------------------------------------------- */
|
||||
pfdl_u16 index_u16; /* 2, W, virt. byte/block index inside PFDL-pool */
|
||||
__near pfdl_u08* data_pu08; /* 2, W, pointer to the 1'st byte of data buffer */
|
||||
pfdl_u16 bytecount_u16; /* 2, W, number of bytes to be transferred */
|
||||
pfdl_command_t command_enu; /* 1, W, command code */
|
||||
} pfdl_request_t; /*------------------------------------------------*/
|
||||
/* 7 bytes in total */
|
||||
/*------------------------------------------------*/
|
||||
|
||||
|
||||
/* PFDL descriptor type */
|
||||
typedef struct
|
||||
{ /* ---------------------------------------------- */
|
||||
pfdl_u08 fx_MHz_u08; /* 1, system frequency expressed in MHz */
|
||||
pfdl_u08 wide_voltage_mode_u08; /* 1, programming voltage mode ( full/wide ) */
|
||||
} pfdl_descriptor_t; /*------------------------------------------------*/
|
||||
/* 2 bytes in total */
|
||||
|
||||
|
||||
/*==============================================================================================*/
|
||||
/* type definition plausibility check */
|
||||
/*==============================================================================================*/
|
||||
|
||||
/* The following checks are implemented in order to check the correct size of the FDL type */
|
||||
/* definitions at compile time. In case of a compilation error in the following lines, please */
|
||||
/* check your compiler options for enumeration types and structures and contact your local */
|
||||
/* support, if necessary. */
|
||||
|
||||
#define R_PFDLT04_STATIC_ASSERT_SIZE(a, b) (1/(sizeof(a) == (unsigned int)(b)))
|
||||
#define R_PFDLT04_STATIC_ASSERT_RANGE(a, b, c) ((1/(sizeof(a) >= (unsigned int)(b))) * (1/(sizeof(a) <= (unsigned int)(c))))
|
||||
|
||||
enum
|
||||
{
|
||||
R_PFDLT04_ASSERT_CHECK
|
||||
= R_PFDLT04_STATIC_ASSERT_SIZE(pfdl_u08, 1) /* Check unsigned type */
|
||||
+ R_PFDLT04_STATIC_ASSERT_SIZE(pfdl_u16, 2) /* Check unsigned type */
|
||||
+ R_PFDLT04_STATIC_ASSERT_SIZE(pfdl_u32, 4) /* Check unsigned type */
|
||||
+ R_PFDLT04_STATIC_ASSERT_SIZE(pfdl_command_t, 1) /* Check enumeration type */
|
||||
+ R_PFDLT04_STATIC_ASSERT_SIZE(pfdl_status_t, 1) /* Check enumeration type */
|
||||
+ R_PFDLT04_STATIC_ASSERT_RANGE(pfdl_request_t, 7, 8) /* Check packed/unpacked structure type */
|
||||
+ R_PFDLT04_STATIC_ASSERT_SIZE(pfdl_descriptor_t, 2) /* Check structure type */
|
||||
};
|
||||
|
||||
#endif
|
||||
Binary file not shown.
@@ -0,0 +1,407 @@
|
||||
/***************************************************************/
|
||||
/* */
|
||||
/* PROJECT NAME : g12_dvm */
|
||||
/* FILE : g12_dvm.c */
|
||||
/* DESCRIPTION : Main Program */
|
||||
/* */
|
||||
/* This file was generated by e2 studio. */
|
||||
/* */
|
||||
/***************************************************************/
|
||||
|
||||
|
||||
#include "iodefine.h"
|
||||
#include "iodefine_ext.h"
|
||||
|
||||
#include "mr_fdl.h"
|
||||
|
||||
#include "dvm_clk.h"
|
||||
#include "dvm_tmr.h"
|
||||
#include "dvm_types.h"
|
||||
#include "dvm_tools.h"
|
||||
|
||||
extern pfdl_status_t mfdl_open( void);
|
||||
extern __far pfdl_u08* __far mfdl_version( void);
|
||||
|
||||
extern void dvm_iic_init( unsigned char addr);
|
||||
|
||||
void iic_cmd_M();
|
||||
void iic_cmd_V();
|
||||
void iic_cmd_R();
|
||||
void iic_cmd_D();
|
||||
void iic_cmd_C();
|
||||
|
||||
typedef enum _iic_stat
|
||||
{
|
||||
ST_IIC_IDLE = 0,
|
||||
ST_IIC_RX = 1,
|
||||
ST_IIC_TX = 2,
|
||||
} iic_state;
|
||||
|
||||
typedef enum _val_state
|
||||
{
|
||||
ST_VAL_OK = 0,
|
||||
ST_VAL_SOFT_OVF = 1,
|
||||
ST_VAL_HARD_OVF = 2,
|
||||
} val_state;
|
||||
|
||||
typedef enum _dvm_command
|
||||
{
|
||||
CMD_NONE = 0,
|
||||
|
||||
CMD_CFG_RD = 1,
|
||||
CMD_CFG_WR = 2,
|
||||
|
||||
CMD_CNV_STOP = 3,
|
||||
CMD_CNV_SINGLE = 4,
|
||||
CMD_CNV_RUN = 5,
|
||||
|
||||
} dvm_command;
|
||||
|
||||
// State machines
|
||||
val_state st_val = ST_VAL_OK;
|
||||
iic_state st_iic = ST_IIC_IDLE;
|
||||
|
||||
// Range stuff
|
||||
char r_div = 1; // range divider
|
||||
|
||||
// Value stuff
|
||||
double v_in = 0.0; // measured input voltage
|
||||
double v_ref = 0.0; // reference voltage for diff mode
|
||||
double v_min = 0.0; // min value
|
||||
double v_max = 0.0; // max value
|
||||
|
||||
// Math stuff
|
||||
char m_diff = 0; // diff mode on/off
|
||||
char m_minmax = 0; // min/max mode on/off
|
||||
|
||||
// Filter stuff
|
||||
char f_filter = 4; // filter length [1..4]
|
||||
|
||||
// IIC stuff
|
||||
short rxCnt; // receive counter
|
||||
short txCnt; // transmit counter
|
||||
unsigned char* rxPtr; // receive pointer
|
||||
unsigned char* txPtr; // transmit pointer
|
||||
|
||||
unsigned char rxBuf[20]; // receive buffer
|
||||
unsigned char txBuf[20]; // transmit buffer
|
||||
|
||||
static unsigned char addr;
|
||||
static config cfg;
|
||||
|
||||
|
||||
int main(void) {
|
||||
// ---------------------------------------------------------
|
||||
// initialize clock
|
||||
// ---------------------------------------------------------
|
||||
dvm_clk_init();
|
||||
|
||||
if( config_read(&cfg) != 0)
|
||||
config_write(&cfg);
|
||||
|
||||
// ---------------------------------------------------------
|
||||
// read IIC address bits [A3..A0]
|
||||
// ---------------------------------------------------------
|
||||
ADPC = 1; // P20 P21 P22 P23 are digital pins
|
||||
PM2 = 0xFF; // P20 P21 P22 P23 are input pins
|
||||
|
||||
addr = 0x40 | (P2 & 0x0F);
|
||||
|
||||
st_iic = ST_IIC_IDLE;
|
||||
|
||||
// ---------------------------------------------------------
|
||||
// initialize TC500A interface
|
||||
//
|
||||
// P41 : output "A"
|
||||
// P42 : output "B"
|
||||
//
|
||||
// initial : A=0, B=1 -> AutoZero
|
||||
// ---------------------------------------------------------
|
||||
P4 &= ~0x02; // A = 0
|
||||
P4 |= ~0x04; // B = 1
|
||||
|
||||
PMC4 &= ~0x06; // P41 P42 are digital pins
|
||||
PM4 &= ~0x06; // P41 P42 are output pins
|
||||
|
||||
// ---------------------------------------------------------
|
||||
// initialize input divider
|
||||
//
|
||||
// P13 : output sel0
|
||||
// P14 : output sel1
|
||||
//
|
||||
// initial : sel0=0, sel1=0 -> 1:1
|
||||
// ---------------------------------------------------------
|
||||
P1 &= ~0x18; // P13=0, P14=0 [1:1]
|
||||
PMC1 &= ~0x18; // P13 P14 are digital pins
|
||||
PM1 &= ~0x18; // P13 P14 are output pins
|
||||
|
||||
// ---------------------------------------------------------
|
||||
// initialize and start timers
|
||||
// ---------------------------------------------------------
|
||||
dvm_tmr_init();
|
||||
dvm_tmr0_start();
|
||||
|
||||
// ---------------------------------------------------------
|
||||
// initialize iic
|
||||
// ---------------------------------------------------------
|
||||
dvm_iic_init( addr);
|
||||
|
||||
EI();
|
||||
|
||||
while(1)
|
||||
{
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
// ================================================================================================
|
||||
// IIC start tx
|
||||
// ================================================================================================
|
||||
void iic_cb_start_tx( void)
|
||||
{
|
||||
st_iic = ST_IIC_TX;
|
||||
}
|
||||
|
||||
// ================================================================================================
|
||||
// IIC start rx
|
||||
// ================================================================================================
|
||||
void iic_cb_start_rx( void)
|
||||
{
|
||||
st_iic = ST_IIC_RX;
|
||||
rxCnt = 0;
|
||||
}
|
||||
|
||||
// ================================================================================================
|
||||
// IIC RX (master -> this)
|
||||
// ================================================================================================
|
||||
void iic_cb_rx( unsigned char data)
|
||||
{
|
||||
if( rxCnt < 20)
|
||||
rxBuf[ rxCnt++] = data;
|
||||
}
|
||||
|
||||
// ================================================================================================
|
||||
// IIC TX (this -> master)
|
||||
// ================================================================================================
|
||||
unsigned char iic_cb_tx( void)
|
||||
{
|
||||
if( txCnt)
|
||||
{
|
||||
txCnt--;
|
||||
return( *txPtr++);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
// ================================================================================================
|
||||
// IIC stop
|
||||
// ================================================================================================
|
||||
void iic_cb_stop( void)
|
||||
{
|
||||
if( st_iic == ST_IIC_RX)
|
||||
{
|
||||
st_iic = ST_IIC_IDLE;
|
||||
|
||||
switch( rxBuf[0])
|
||||
{
|
||||
case 'M': iic_cmd_M(); break;
|
||||
case 'V': iic_cmd_V(); break;
|
||||
case 'R': iic_cmd_R(); break;
|
||||
case 'D': iic_cmd_D(); break;
|
||||
case 'C': iic_cmd_C(); break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// ================================================================================================
|
||||
// M commads (math functions)
|
||||
// ================================================================================================
|
||||
void iic_cmd_M()
|
||||
{
|
||||
unsigned char p1 = rxBuf[1];
|
||||
unsigned char p2 = rxBuf[2];
|
||||
unsigned char p3 = rxBuf[3];
|
||||
|
||||
}
|
||||
|
||||
// ================================================================================================
|
||||
// V commands (value)
|
||||
// ================================================================================================
|
||||
void iic_cmd_V()
|
||||
{
|
||||
v_in = 13.456;
|
||||
|
||||
if( rxCnt == 2 && rxBuf[1] == '?')
|
||||
{
|
||||
if( st_val == ST_VAL_HARD_OVF)
|
||||
{
|
||||
txBuf[0] = 'O';
|
||||
txBuf[1] = 'V';
|
||||
txBuf[2] = 'F';
|
||||
txBuf[3] = 0;
|
||||
}
|
||||
|
||||
else
|
||||
printS35( txBuf, '+', v_in, 1);
|
||||
|
||||
txPtr = txBuf;
|
||||
txCnt = 12;
|
||||
}
|
||||
}
|
||||
|
||||
// ================================================================================================
|
||||
// R commands (range)
|
||||
// ================================================================================================
|
||||
void iic_cmd_R()
|
||||
{
|
||||
unsigned char p1 = rxBuf[1];
|
||||
|
||||
if( rxCnt == 2)
|
||||
{
|
||||
switch(p1)
|
||||
{
|
||||
// query range
|
||||
// ---------------------------------------------
|
||||
case '?':
|
||||
txBuf[0] = (unsigned char)r_div +'0';
|
||||
txPtr = txBuf;
|
||||
txCnt = 1;
|
||||
break;
|
||||
|
||||
// set range
|
||||
// ---------------------------------------------
|
||||
case '0': // auto
|
||||
case '1': // 1:1
|
||||
case '2': // 1:10
|
||||
case '3': // 1:100
|
||||
// set_range(p1 - '0');
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
// ================================================================================================
|
||||
// D commands ()
|
||||
// ================================================================================================
|
||||
void iic_cmd_D()
|
||||
{
|
||||
unsigned char p1 = rxBuf[1];
|
||||
unsigned char p2 = rxBuf[2];
|
||||
double value;
|
||||
short sval;
|
||||
|
||||
// -------------------------------------------------------------------------
|
||||
// get calibration data
|
||||
//
|
||||
// D1? : get reference value 3.5
|
||||
// D2? : get 1:10 divider ratio 3.5
|
||||
// D3? : get 1:100 divider ratio 3.5
|
||||
// D4? : get comparator delay fix 4
|
||||
//
|
||||
// -------------------------------------------------------------------------
|
||||
if( rxCnt == 3 && p2 == '?')
|
||||
{
|
||||
txPtr = txBuf;
|
||||
|
||||
switch(p1)
|
||||
{
|
||||
case '1': print35( txBuf, cfg.vref, 1); txCnt = 11; break;
|
||||
case '2': print35( txBuf, cfg.div10, 1); txCnt = 11; break;
|
||||
case '3': print35( txBuf, cfg.div100, 1); txCnt = 11; break;
|
||||
case '4': print4( txBuf, cfg.delay); txCnt = 5; break;
|
||||
}
|
||||
}
|
||||
|
||||
// -------------------------------------------------------------------------
|
||||
// set calibration data
|
||||
//
|
||||
// D1 : set reference value 3.5
|
||||
// D2 : set 1:10 divider ratio 3.5
|
||||
// D3 : set 1:100 divider ratio 3.5
|
||||
// D4 : set comparator delay fix 4
|
||||
//
|
||||
// -------------------------------------------------------------------------
|
||||
else if( rxCnt == 11)
|
||||
{
|
||||
double v = 0;
|
||||
|
||||
switch( p1)
|
||||
{
|
||||
case '1': if( (v = scan35( &rxBuf[2])) != 0) cfg.vref = v; break;
|
||||
case '2': if( (v = scan35( &rxBuf[2])) != 0) cfg.div10 = v; break;
|
||||
case '3': if( (v = scan35( &rxBuf[2])) != 0) cfg.div100= v; break;
|
||||
}
|
||||
}
|
||||
|
||||
else if( rxCnt == 6)
|
||||
switch( p1)
|
||||
{
|
||||
case '4': if( (sval = scan4( &rxBuf[2])) != 0) cfg.delay = sval; break;
|
||||
}
|
||||
}
|
||||
|
||||
// ================================================================================================
|
||||
// C commands (calibrate)
|
||||
// ================================================================================================
|
||||
void iic_cmd_C()
|
||||
{
|
||||
unsigned char p1 = rxBuf[1];
|
||||
unsigned char p2 = rxBuf[2];
|
||||
|
||||
// -------------------------------------------------------------------------
|
||||
// read/write calibration data from/to flash
|
||||
// -------------------------------------------------------------------------
|
||||
if( rxCnt == 2)
|
||||
{
|
||||
switch(p1)
|
||||
{
|
||||
case 'R': config_read( &cfg); break;
|
||||
case 'W': config_write(&cfg); break;
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
if( rxCnt == 12)
|
||||
{
|
||||
if( p1 == '1' || p1 == '2' || p1 == '3')
|
||||
{
|
||||
_int = t_int;
|
||||
_dei = t_deint;
|
||||
_in = v_in;
|
||||
|
||||
iii = (rxBuf[ 3] - '0') * 100;
|
||||
iii += (rxBuf[ 4] - '0') * 10;
|
||||
iii += (rxBuf[ 5] - '0') * 1;
|
||||
|
||||
fff = (rxBuf[ 7] - '0') * 10000.0;
|
||||
fff += (rxBuf[ 8] - '0') * 1000.0;
|
||||
fff += (rxBuf[ 9] - '0') * 100.0;
|
||||
fff += (rxBuf[10] - '0') * 10.0;
|
||||
fff += (rxBuf[11] - '0') * 1.0;
|
||||
|
||||
cal = iii + fff / 100000.0;
|
||||
|
||||
switch(p1)
|
||||
{
|
||||
// reference
|
||||
case '1':
|
||||
cfg.vref = cal * (long)_int / (long)_dei;
|
||||
break;
|
||||
|
||||
// 1:10 divider
|
||||
case '2':
|
||||
break;
|
||||
|
||||
// 1:100 divider
|
||||
case '3':
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
*/
|
||||
}
|
||||
|
||||
|
||||
@@ -0,0 +1,20 @@
|
||||
#include <iodefine.h>
|
||||
#include <iodefine_ext.h>
|
||||
#include <dvm_clk.h>
|
||||
|
||||
void dvm_clk_init( void)
|
||||
{
|
||||
// --------------------------------------------------------------
|
||||
// configure clock generator (24MHz)
|
||||
// --------------------------------------------------------------
|
||||
CMC = 0; // fMX pins (X1,X2) are input port pins
|
||||
MSTOP = 1; // stop fMX (external) osc.
|
||||
|
||||
// set fMAIN
|
||||
MCM0 = 0; // fMAIN <- fIH (int. HighSpeed)
|
||||
OSMC = 0; // stop 12 bit internal timer clock
|
||||
|
||||
// set fIH
|
||||
HIOSTOP = 0; // start HS on-chip osc.
|
||||
}
|
||||
|
||||
+152
@@ -0,0 +1,152 @@
|
||||
#include "iodefine.inc"
|
||||
#include "iodefine_ext.inc"
|
||||
|
||||
.extern _iic_cb_start_rx
|
||||
.extern _iic_cb_start_tx
|
||||
.extern _iic_cb_stop
|
||||
.extern _iic_cb_tx
|
||||
.extern _iic_cb_rx
|
||||
|
||||
.global _dvm_iic_init
|
||||
.global _iic_isr
|
||||
|
||||
.set ST_STOP, 1
|
||||
.set ST_ADDR, 2
|
||||
|
||||
.section .sdata,"a"
|
||||
status: .byte 0
|
||||
|
||||
.section .text,"ax"
|
||||
|
||||
;;; ===============================================================================================
|
||||
;;; IIC init
|
||||
;;; ===============================================================================================
|
||||
_dvm_iic_init: set1 !IICA0EN ; supply IICA0 clock (enable module)
|
||||
clr1 !IICE0 ; disable IICA0 operation
|
||||
|
||||
set1 IICAMK0 ; disable IIC interrupt
|
||||
clr1 IICAIF0 ; clear IIC interrupt flag
|
||||
|
||||
clr1 IICAPR10 ; set IIC interrupt low priority (1,1)
|
||||
clr1 IICAPR00 ; high priority (0,0)
|
||||
|
||||
; IIC pins
|
||||
; ---------------------------------------------
|
||||
mov P6, #0x00 ; set SCL (P60) and SDA (P61) bits to zero
|
||||
mov PM6, #0xFF ; set SCL and SDA to input
|
||||
|
||||
clr1 !SMC0 ; standard mode (100 kHz)
|
||||
mov !IICWL0, #40 ; low level pulse width
|
||||
mov !IICWH0, #39 ; high level pulse width
|
||||
|
||||
; set1 !SMC0 ; fast mode (400 kHz)
|
||||
; mov !IICWL0, #16 ; low level pulse width
|
||||
; mov !IICWH0, #15 ; high level pulse width
|
||||
|
||||
|
||||
clr1 !DFC0 ; disable digital filter
|
||||
set1 !PRS0 ; clk = fclk/2 (if fclk > 20 MHz)
|
||||
|
||||
shl A, #1
|
||||
mov !SVA0, A ; slave address
|
||||
|
||||
set1 STCEN0 ;
|
||||
set1 IICRSV0
|
||||
|
||||
clr1 !SPIE0 ; disable stop interrupt
|
||||
|
||||
set1 !WTIM0 ; int gen at 9th clock falling edge
|
||||
set1 !ACKE0 ; enable ACK
|
||||
|
||||
clr1 IICAMK0 ; enable interrupt
|
||||
|
||||
set1 !IICE0 ; enable IICA0
|
||||
set1 !LREL0 ; enter standby mode
|
||||
|
||||
mov PM6, #0xFC ; set SCL and SDA to output
|
||||
ret
|
||||
|
||||
;;; ===============================================================================================
|
||||
;;; IIC interrupt service routine
|
||||
;;; ===============================================================================================
|
||||
_iic_isr: ei ; enable interrupt
|
||||
push AX ; save registers
|
||||
|
||||
mov P1, #0xFF
|
||||
mov P1, #0x00
|
||||
|
||||
bf SPD0, $iic_addr ; if STOP interrupt received then
|
||||
clr1 !SPIE0 ; disable STOP interrupt
|
||||
mov status, #ST_STOP ; update status
|
||||
|
||||
call !!_iic_cb_stop ; iic_cb_stop();
|
||||
br $iic_ret ; return;
|
||||
|
||||
; ---------------------------------------------------------------------------------
|
||||
; ---------------------------------------------------------------------------------
|
||||
; ADDRESS MATCH INTERRUPT
|
||||
; ---------------------------------------------------------------------------------
|
||||
; ---------------------------------------------------------------------------------
|
||||
iic_addr: bf STD0, $iic_xmit ; if not START condition then xmit interrupt
|
||||
bf COI0, $iic_ret ; if not COI0 interrupt then error
|
||||
|
||||
set1 !SPIE0 ; enable STOP interrupt receiving
|
||||
mov status, #ST_ADDR ; update status
|
||||
|
||||
bt TRC0, $iic_addr_tx ; check direcion (bit 0 of address)
|
||||
|
||||
; ---------------------------------------------
|
||||
; address + rx bit (write by the master)
|
||||
; ---------------------------------------------
|
||||
iic_addr_rx: clr1 !WTIM0 ; generate interrupt @ 8th clock's falling edge
|
||||
set1 !ACKE0 ; enable ACK generation
|
||||
set1 !WREL0 ; release wait
|
||||
|
||||
call !!_iic_cb_start_rx ; iic_cb_start_rx();
|
||||
br $iic_ret
|
||||
|
||||
; ---------------------------------------------
|
||||
; address + tx bit (read by the master)
|
||||
; ---------------------------------------------
|
||||
iic_addr_tx: set1 !WTIM0 ; generate interrupt @ 9th clock's falling edge
|
||||
;
|
||||
call !!_iic_cb_start_tx ; iic_cb_start_rx();
|
||||
br $iic_xmit_tx1 ; send 1st byte
|
||||
|
||||
; ---------------------------------------------------------------------------------
|
||||
; ---------------------------------------------------------------------------------
|
||||
; DATA TRANSFER INTERRUPT
|
||||
; ---------------------------------------------------------------------------------
|
||||
; ---------------------------------------------------------------------------------
|
||||
iic_xmit: bt TRC0, $iic_xmit_tx ; check direction
|
||||
|
||||
; ---------------------------------------------
|
||||
; RX (write by master)
|
||||
; ---------------------------------------------
|
||||
iic_xmit_rx: mov A, IICA0 ; get data
|
||||
call !!_iic_cb_rx ; iic_cb_rx();
|
||||
|
||||
iic_xmit_rx1: set1 !WREL0 ; release wait
|
||||
br $iic_ret
|
||||
|
||||
; ---------------------------------------------
|
||||
; TX (read by master)
|
||||
; ---------------------------------------------
|
||||
iic_xmit_tx: bf ACKD0, $iic_xmit_rx1 ; if no ACK from the master it means, the master
|
||||
; doesn't need more data -> finishing transfer
|
||||
|
||||
iic_xmit_tx1: call !!_iic_cb_tx ; data = iic_cb_tx
|
||||
mov IICA0, A ; send it
|
||||
|
||||
; ---------------------------------------------
|
||||
; return from the interrupt
|
||||
; ---------------------------------------------
|
||||
iic_ret: pop AX ; restore registers
|
||||
reti ;
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
+224
@@ -0,0 +1,224 @@
|
||||
#include "iodefine.inc"
|
||||
#include "iodefine_ext.inc"
|
||||
|
||||
.extern process
|
||||
.extern process2
|
||||
.extern process3
|
||||
|
||||
.global _cnt_int_lo
|
||||
.global _cnt_int_hi
|
||||
.global _cnt_deint_lo
|
||||
.global _cnt_deint_hi
|
||||
.global _cnt_sign
|
||||
|
||||
#define stAZ 0x00
|
||||
#define stINT 0x04
|
||||
#define stDEINT 0x08
|
||||
#define stIOZ 0x0C
|
||||
|
||||
#define P20 0xFFF02.0
|
||||
#define P137 0xFFF0D.7
|
||||
|
||||
#define TRIGGER P20
|
||||
|
||||
.section .data, "a"
|
||||
|
||||
.align 2
|
||||
state: .byte 0, 0
|
||||
ticks: .byte 0xFF
|
||||
|
||||
_cnt_int_lo: .byte 0, 0
|
||||
_cnt_int_hi: .byte 0, 0
|
||||
|
||||
_cnt_deint_lo: .byte 0, 0
|
||||
_cnt_deint_hi: .byte 0, 0
|
||||
|
||||
_cnt_sign: .byte 0
|
||||
|
||||
.align 2
|
||||
cnt_tmr01: .byte 0, 0
|
||||
|
||||
;;; ===============================================================================================
|
||||
;;; TMR00 interrupt service routine
|
||||
;; ================================================================================================
|
||||
isr_tmr00: push AX
|
||||
|
||||
movw AX, #st_table
|
||||
addw AX, !state
|
||||
br AX
|
||||
|
||||
st_table: br !!st_az
|
||||
br !!st_int
|
||||
br !!st_deint
|
||||
|
||||
;;; ----------------------------------------------------------------------
|
||||
;;; AutoZero
|
||||
;;; ----------------------------------------------------------------------
|
||||
st_az: cmp !ticks, #120 ;
|
||||
sknh ; if(tick > 40)
|
||||
mov !ticks, #0xFF ; tick = -1;
|
||||
;
|
||||
inc !ticks ; tick++
|
||||
|
||||
; ------------------------------------
|
||||
st_az_0: cmp0 !ticks ; if ticks = 0 then
|
||||
bnz $st_az_1 ; begin
|
||||
;
|
||||
set1 TRIGGER ; TRIGGER := 1;
|
||||
mov P4, #4 ; TC500A := AutoZero
|
||||
;
|
||||
pop ax ;
|
||||
reti ; RETI;
|
||||
; end;
|
||||
|
||||
; ------------------------------------
|
||||
st_az_1: cmp !ticks, #1 ; if ticks = 1 then
|
||||
bnz $st_az_2 ; begin
|
||||
;
|
||||
clr1 TRIGGER ; TRIGGER := 0;
|
||||
pop ax ; RETI;
|
||||
reti ; end;
|
||||
|
||||
; ------------------------------------
|
||||
st_az_2: cmp !ticks, #2 ; if ticks = 2 then
|
||||
bnz $st_az_3 ; begin
|
||||
;
|
||||
call !!_process ; process();
|
||||
pop ax ; RETI;
|
||||
reti ; end;
|
||||
|
||||
; ------------------------------------
|
||||
st_az_3: cmp !ticks, #3 ; if ticks = 3 then
|
||||
bnz $st_az_4 ; begin
|
||||
;
|
||||
call !!_process2 ; process2();
|
||||
pop ax ; RETI;
|
||||
reti ; end;
|
||||
|
||||
; ------------------------------------
|
||||
st_az_4: cmp !ticks, #4 ; if ticks = 4 then
|
||||
bnz $st_az_38 ; begin
|
||||
;
|
||||
call !!_process3 ; process3();
|
||||
pop ax ; RETI;
|
||||
reti ; end;
|
||||
|
||||
; ------------------------------------
|
||||
st_az_38: cmp !ticks, #120 ; if ticks = 120 then (40 !!)
|
||||
bnz $st_az_99 ; begin
|
||||
;
|
||||
mov !ticks, #0xFF ; ticks := -1;
|
||||
mov !state, #stINT ; state := Integrate;
|
||||
;br $st_int_00 ; end;
|
||||
|
||||
st_az_99: pop ax ; RETI;
|
||||
reti ;
|
||||
|
||||
;;; ----------------------------------------------------------------------
|
||||
;;; Integrate/Deintegrate phase
|
||||
;;; ----------------------------------------------------------------------
|
||||
st_int: cmp !ticks, #40 ;
|
||||
sknh ; if(tick > 40)
|
||||
mov !ticks, #0xFF ; tick = -1;
|
||||
;
|
||||
inc !ticks ; tick++
|
||||
|
||||
; End of Integrate phase
|
||||
; - save TMR01 counters
|
||||
; - stop TMR00
|
||||
st_int_39: cmp !ticks, #40
|
||||
bnz $st_int_0
|
||||
|
||||
ei
|
||||
|
||||
; stop TMR00
|
||||
; ----------------------------
|
||||
set1 !TT0L.0 ; trigger to stop
|
||||
;
|
||||
clr1 TMIF00 ; clear TMR01 interrupt flag
|
||||
set1 TMMK00 ; disable TMR01 interrupt
|
||||
|
||||
; start Deintegrate phase
|
||||
; ----------------------------
|
||||
mov P4, #6 ; TC500A <= stDEINT
|
||||
|
||||
sel RB1 ;
|
||||
di ;
|
||||
movw AX, !TCR01 ; integration time
|
||||
movw !_cnt_int_lo, AX ;
|
||||
movw AX, !cnt_tmr01 ;
|
||||
movw !_cnt_int_hi, AX ;
|
||||
ei ;
|
||||
sel RB0 ; (TCA reacts on CMP in 2 us)
|
||||
|
||||
|
||||
st_int_391: bt P137, $st_int_391 ; wait for CMP falling edge
|
||||
mov P4, #0 ; TCA500A <= stIOZ
|
||||
;
|
||||
set1 !TT0L.1 ; stop TMR01
|
||||
;
|
||||
st_int_392: bf P137, $st_int_392 ; wait for CMP rising edge
|
||||
mov P4, #4 ; TCA500A <= stAZ
|
||||
|
||||
|
||||
sel RB1 ;
|
||||
movw AX, !TCR01 ; integration time
|
||||
movw !_cnt_deint_lo, AX ;
|
||||
movw AX, !cnt_tmr01 ;
|
||||
movw !_cnt_deint_hi, AX ;
|
||||
sel RB0 ;
|
||||
|
||||
; restart TMR00
|
||||
; ----------------------------
|
||||
clr1 TMIF00 ; clear TMR01 interrupt flag
|
||||
clr1 TMMK00 ; enable TMR01 interrupt
|
||||
;
|
||||
set1 !TS0L.0 ; trigger to start
|
||||
|
||||
|
||||
; move state to stAZ
|
||||
; ----------------------------
|
||||
mov !ticks, #0xFF ; clear ticks
|
||||
mov !state, #stAZ ; set state
|
||||
|
||||
pop ax
|
||||
reti
|
||||
|
||||
; ------------------
|
||||
; start tmr01
|
||||
; ------------------
|
||||
st_int_0: cmp0 !ticks
|
||||
bnz $st_int_35
|
||||
|
||||
st_int_00: clr1 TMIF01 ; clear TMR01 interrupt flag
|
||||
clr1 TMMK01 ; enable TMR01 interrupt
|
||||
|
||||
set1 !TS0L.1 ; enable TMR01
|
||||
|
||||
mov P4,#2 ; TC500A <= integrate
|
||||
|
||||
clrw ax
|
||||
movw !cnt_tmr01, ax ; clear TMR01 overflow counter
|
||||
|
||||
pop ax
|
||||
reti
|
||||
|
||||
st_int_35: cmp !ticks,#35
|
||||
bnz $st_int_99
|
||||
|
||||
bf P137, $st_int_351
|
||||
mov !_cnt_sign, #0
|
||||
reti
|
||||
|
||||
st_int_351: mov !_cnt_sign, #1
|
||||
pop ax
|
||||
reti
|
||||
|
||||
st_int_99: pop ax
|
||||
reti
|
||||
|
||||
st_deint: pop ax
|
||||
reti
|
||||
|
||||
|
||||
.end
|
||||
+147
@@ -0,0 +1,147 @@
|
||||
#include <iodefine.h>
|
||||
#include <iodefine_ext.h>
|
||||
#include <dvm_tmr.h>
|
||||
|
||||
void isr_tmr0( void) __attribute__ ((interrupt));
|
||||
void isr_tmr1( void) __attribute__ ((interrupt));
|
||||
|
||||
static unsigned short tmr1_hi = 0;
|
||||
static unsigned short tmr1_lo = 0;
|
||||
|
||||
#define TS00 TS0L_bit.no0
|
||||
#define TS01 TS0L_bit.no1
|
||||
#define TS02 TS0L_bit.no2
|
||||
#define TS03 TS0L_bit.no3
|
||||
|
||||
#define TT00 TT0L_bit.no0
|
||||
#define TT01 TT0L_bit.no1
|
||||
#define TT02 TT0L_bit.no2
|
||||
#define TT03 TT0L_bit.no3
|
||||
|
||||
// =================================================================================================
|
||||
// init
|
||||
// =================================================================================================
|
||||
void dvm_tmr_init( void)
|
||||
{
|
||||
// ---------------------------------------------------------------
|
||||
// initialize timers
|
||||
// ---------------------------------------------------------------
|
||||
TAU0EN = 1; //
|
||||
|
||||
TPS0 = 0x0030; // CK0 = 24 MHz
|
||||
// CK1 = 3 MHz
|
||||
// CK2 = 12 MHz (not used)
|
||||
// CK3 = 94 kHz (not used)
|
||||
|
||||
TT0 = 0x0A0F; // stop all channels
|
||||
|
||||
TMMK00 = 1; // disable TM00 interrupt
|
||||
TMMK01 = 1; // disable TM01 interrupt
|
||||
TMMK02 = 1; // disable TM02 interrupt
|
||||
TMMK03 = 1; // disable TM03 interrupt
|
||||
|
||||
TMIF00 = 0; // clear TM00 interrupt flag
|
||||
TMIF01 = 0; // clear TM01 interrupt flag
|
||||
TMIF02 = 0; // clear TM02 interrupt flag
|
||||
TMIF03 = 0; // clear TM03 interrupt flag
|
||||
|
||||
// ---------------------------------------------------------------
|
||||
// TMR 00: 1 kHz interval timer mode (system tick)
|
||||
// ---------------------------------------------------------------
|
||||
TMR00 = 0x0000; // source is CK0 = 24 MHz
|
||||
TDR00 = 23999; // 1 MHz @ 24 MHz system clock
|
||||
|
||||
TMPR100 = 1; // interrupt priority (3 low)
|
||||
TMPR000 = 1; //
|
||||
|
||||
// ---------------------------------------------------------------
|
||||
// TMR 01: time measurement @ 3 MHz
|
||||
// ---------------------------------------------------------------
|
||||
TMR01 = 0x8000; // source is CK1 = 3 MHz
|
||||
TDR01 = 0xFFFF; //
|
||||
|
||||
TMPR101 = 0; // interrupt priority (0 high)
|
||||
TMPR001 = 0; //
|
||||
|
||||
// ---------------------------------------------------------------
|
||||
// Common
|
||||
// ---------------------------------------------------------------
|
||||
TO0 = 0x0000; // output value for all timers = 0
|
||||
TOE0 = 0x0000; // disable timer outputs to pins
|
||||
|
||||
TOM0 = 0x0000; //
|
||||
TOL0 = 0x0000; //
|
||||
}
|
||||
|
||||
// =================================================================================================
|
||||
// start tmr 00
|
||||
// =================================================================================================
|
||||
void dvm_tmr0_start( void)
|
||||
{
|
||||
TMIF00 = 0; // clear TMR00 interrupt flag
|
||||
TMMK00 = 0; // enable TMR00 interrupt
|
||||
|
||||
TS00 = 1; // start TMR00
|
||||
}
|
||||
|
||||
// =================================================================================================
|
||||
// stop tmr 00
|
||||
// =================================================================================================
|
||||
void dvm_tmr0_stop( void)
|
||||
{
|
||||
TT00 = 1; // stop TMR00
|
||||
|
||||
TMMK00 = 1; // disable TMR00 interrupt
|
||||
TMIF00 = 0; // clear TMR00 interrupt flag
|
||||
}
|
||||
|
||||
// =================================================================================================
|
||||
// start tmr 01
|
||||
// =================================================================================================
|
||||
void dvm_tmr1_start( void)
|
||||
{
|
||||
TMIF01 = 0; // clear TMR01 interrupt flag
|
||||
TMMK01 = 0; // enable TMR01 interrupt
|
||||
|
||||
TS01 = 1; // start TMR01
|
||||
|
||||
tmr1_hi = 0;
|
||||
tmr1_lo = 0;
|
||||
}
|
||||
|
||||
// =================================================================================================
|
||||
// stop tmr 01
|
||||
// =================================================================================================
|
||||
void dvm_tmr1_stop( void)
|
||||
{
|
||||
TT01 = 1; // stop TMR01
|
||||
|
||||
TMMK01 = 1; // disable TMR01 interrupt
|
||||
TMIF01 = 0; // clear TMR01 interrupt flag
|
||||
}
|
||||
|
||||
// =================================================================================================
|
||||
// TMR00 interrupt service
|
||||
// =================================================================================================
|
||||
void isr_tmr0(void)
|
||||
{
|
||||
TMIF00 = 0; // clear TMR00 interrupt flag
|
||||
// P4 = P4 ^ 0xF; // toggle p4[3..0] bits for test
|
||||
}
|
||||
|
||||
// =================================================================================================
|
||||
// TMR01 interrupt service
|
||||
// =================================================================================================
|
||||
void isr_tmr1(void)
|
||||
{
|
||||
tmr1_hi++;
|
||||
}
|
||||
|
||||
// =================================================================================================
|
||||
// =================================================================================================
|
||||
unsigned long dvm_tmr1_count(void)
|
||||
{
|
||||
unsigned long x = TDR01 - TCR01;
|
||||
|
||||
return( ((unsigned long)tmr1_hi << 16) + x);
|
||||
}
|
||||
+176
@@ -0,0 +1,176 @@
|
||||
#include <dvm_types.h>
|
||||
#include <dvm_tools.h>
|
||||
#include "mr_fdl.h"
|
||||
|
||||
#include <stdio.h>
|
||||
|
||||
// =================================================================================================
|
||||
// read configuration
|
||||
// =================================================================================================
|
||||
int config_read( config * cfg)
|
||||
{
|
||||
int rc = 1;
|
||||
pfdl_u16 len = sizeof( config);
|
||||
|
||||
if( cfg)
|
||||
{
|
||||
if( mfdl_open() == PFDL_OK)
|
||||
{
|
||||
mfdl_read( 0, len, (pfdl_u08*)cfg);
|
||||
mfdl_close();
|
||||
}
|
||||
|
||||
if( cfg->pre != 0x2849 || cfg->post != 0x9482)
|
||||
{
|
||||
cfg->pre = 0x2849;
|
||||
cfg->vref = 2.49780;
|
||||
cfg->div10 = 10.0;
|
||||
cfg->div100 = 100.0;
|
||||
cfg->delay = 8;
|
||||
cfg->post = 0x9482;
|
||||
}
|
||||
|
||||
else
|
||||
rc = 0;
|
||||
}
|
||||
|
||||
return rc;
|
||||
}
|
||||
|
||||
// =================================================================================================
|
||||
// write configuration
|
||||
// =================================================================================================
|
||||
void config_write( config * cfg)
|
||||
{
|
||||
pfdl_u16 len = sizeof( config);
|
||||
|
||||
if( cfg)
|
||||
{
|
||||
if( mfdl_open() == PFDL_OK)
|
||||
{
|
||||
if( mfdl_erase( 0) == PFDL_OK)
|
||||
{
|
||||
mfdl_write( 0, len, (pfdl_u08*)cfg);
|
||||
mfdl_close();
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// =================================================================================================
|
||||
static void printfrac( unsigned char *buf, double value, unsigned short len)
|
||||
{
|
||||
unsigned short i;
|
||||
short d;
|
||||
|
||||
for( i=len; i>0; i--)
|
||||
{
|
||||
value *= 10;
|
||||
d = (short)value;
|
||||
value -= d;
|
||||
|
||||
*buf++ = (unsigned char)d + '0';
|
||||
}
|
||||
}
|
||||
|
||||
// =================================================================================================
|
||||
static void printlong( unsigned char *buf, long value, unsigned short len, unsigned char supress_zero)
|
||||
{
|
||||
unsigned short i;
|
||||
long d;
|
||||
|
||||
for( i=len; i>0; i--)
|
||||
{
|
||||
d = value % 10;
|
||||
|
||||
if( value == 0 && supress_zero && i != len)
|
||||
buf[i-1] = ' ';
|
||||
else
|
||||
buf[i-1] = (unsigned char)d + '0';
|
||||
|
||||
value = value / 10;
|
||||
}
|
||||
}
|
||||
|
||||
// =================================================================================================
|
||||
// scan double value in 999.99999 (3.5) notation
|
||||
// =================================================================================================
|
||||
double scan35( unsigned char *b)
|
||||
{
|
||||
double rc = 0.0;
|
||||
long iii;
|
||||
long long fff;
|
||||
|
||||
iii = (b[ 0] - '0') * 100;
|
||||
iii += (b[ 1] - '0') * 10;
|
||||
iii += (b[ 2] - '0') * 1;
|
||||
|
||||
fff = (long long)(b[ 4] - '0') * 10000;
|
||||
fff += (b[ 5] - '0') * 1000;
|
||||
fff += (b[ 6] - '0') * 100;
|
||||
fff += (b[ 7] - '0') * 10;
|
||||
fff += (b[ 8] - '0') * 1;
|
||||
|
||||
rc = iii + fff / 100000.0;
|
||||
|
||||
return rc;
|
||||
}
|
||||
|
||||
// =================================================================================================
|
||||
// scan short value in 9999 (4.0) notation
|
||||
// =================================================================================================
|
||||
short scan4( unsigned char *b)
|
||||
{
|
||||
short rv;
|
||||
|
||||
rv = (b[0] - '0') * 1000;
|
||||
rv += (b[1] - '0') * 100;
|
||||
rv += (b[2] - '0') * 10;
|
||||
rv += (b[3] - '0') * 1;
|
||||
|
||||
return rv;
|
||||
}
|
||||
|
||||
// =================================================================================================
|
||||
// print short value in 9999 (4.0) notation
|
||||
// =================================================================================================
|
||||
void print4( unsigned char *buf, short val)
|
||||
{
|
||||
printlong( buf, val, 4, 1);
|
||||
buf[4] = 0;
|
||||
}
|
||||
|
||||
// =================================================================================================
|
||||
// print double value in 3.5 notation
|
||||
// =================================================================================================
|
||||
void print35( unsigned char *buf, double val, unsigned char supress_zero)
|
||||
{
|
||||
long _int = (int)val;
|
||||
double _fra = val - (double)_int;
|
||||
|
||||
buf[ 3] = '.';
|
||||
buf[ 9] = 0;
|
||||
|
||||
printlong( &buf[0], _int, 3, supress_zero);
|
||||
printfrac( &buf[4], _fra, 5);
|
||||
}
|
||||
|
||||
// =================================================================================================
|
||||
// print double value in S3.5 notation
|
||||
// =================================================================================================
|
||||
void printS35( unsigned char *b, unsigned char sign, double val, unsigned char supress_zero)
|
||||
{
|
||||
unsigned char s = sign;
|
||||
|
||||
if( val < 0.0)
|
||||
{
|
||||
s = 1;
|
||||
val = -val;
|
||||
}
|
||||
|
||||
print35( b+1, val, supress_zero);
|
||||
b[ 0] = (s) ? '-' : sign;
|
||||
}
|
||||
|
||||
|
||||
|
||||
+240
@@ -0,0 +1,240 @@
|
||||
.extern PFDL_Open
|
||||
.extern PFDL_Close
|
||||
.extern PFDL_Handler
|
||||
.extern PFDL_GetVersionString
|
||||
.extern PFDL_Execute
|
||||
|
||||
.global _mfdl_open
|
||||
.global _mfdl_close
|
||||
.global _mfdl_handler
|
||||
.global _mfdl_version
|
||||
|
||||
.global _mfdl_read
|
||||
.global _mfdl_write
|
||||
.global _mfdl_check
|
||||
.global _mfdl_erase
|
||||
.global _mfdl_verify
|
||||
|
||||
.type _mfdl_open, @function
|
||||
.type _mfdl_close, @function
|
||||
.type _mfdl_handler, @function
|
||||
.type _mfdl_version, @function
|
||||
|
||||
.type mfdl_execute, @function
|
||||
|
||||
.type _mfdl_read, @function
|
||||
.type _mfdl_write, @function
|
||||
.type _mfdl_check, @function
|
||||
.type _mfdl_erase, @function
|
||||
.type _mfdl_verify, @function
|
||||
|
||||
/* PFDL command code set as used for pfdl_command_t */
|
||||
|
||||
/* ---------------------------------------------- */
|
||||
#define PFDL_CMD_READ_BYTES (0x00) /* 0x00, reads data from flash memory */
|
||||
#define PFDL_CMD_IVERIFY_BYTES (0x06) /* 0x06, verifies data if flash content is stable */
|
||||
#define PFDL_CMD_BLANKCHECK_BYTES (0x08) /* 0x08, checks if flash content is blank */
|
||||
#define PFDL_CMD_WRITE_BYTES (0x04) /* 0x04, writes data into flash memory */
|
||||
#define PFDL_CMD_ERASE_BLOCK (0x03) /* 0x03, erases one flash block */
|
||||
/* ---------------------------------------------- */
|
||||
|
||||
/* PFDL error code set as used for pfdl_status_t */
|
||||
|
||||
/* operation related status */ /* ---------------------------------------------- */
|
||||
#define PFDL_IDLE (0x30) /* 0x30, PFDL ready to receive requests */
|
||||
#define PFDL_OK (0x00) /* 0x00, command finished without problems */
|
||||
#define PFDL_BUSY (0xFF) /* 0xFF, command is being processed */
|
||||
|
||||
/* flash related status */
|
||||
/* ---------------------------------------------- */
|
||||
#define PFDL_ERR_PROTECTION (0x10) /* 0x10, protection error (access right conflict) */
|
||||
#define PFDL_ERR_ERASE (0x1A) /* 0x1A, erase error */
|
||||
#define PFDL_ERR_MARGIN (0x1B) /* 0x1B, blankcheck or verify margin violated */
|
||||
#define PFDL_ERR_WRITE (0x1C) /* 0x1C, write error */
|
||||
#define PFDL_ERR_PARAMETER (0x05) /* 0x05, parameter error */
|
||||
/* ---------------------------------------------- */
|
||||
|
||||
.section .data, "a"
|
||||
dsc:
|
||||
dsc_freq: .skip 1 ; system frequency expressed in MHz
|
||||
dsc_wide: .skip 1 ; programming voltage mode ( full/wide )
|
||||
|
||||
req:
|
||||
req_index: .skip 2 ; virtual byte/block index inside PFDL-pool
|
||||
req.data: .skip 2 ; pointer to the 1'st byte of data buffer
|
||||
req.length: .skip 2 ; number of bytes to be transferred
|
||||
req.command: .skip 1
|
||||
|
||||
.section "mfdl", "ax", @progbits
|
||||
|
||||
; =================================================================================================
|
||||
; Open
|
||||
; =================================================================================================
|
||||
_mfdl_open: push hl
|
||||
push bc
|
||||
|
||||
movw hl, #dsc
|
||||
mov [hl +0], #24 ; system frequency = 24 MHz
|
||||
mov [hl +1], #1 ; voltage mode = wide
|
||||
|
||||
movw ax, hl
|
||||
call !!PFDL_Open
|
||||
|
||||
pop bc
|
||||
pop hl
|
||||
ret
|
||||
|
||||
; =================================================================================================
|
||||
; Close
|
||||
; =================================================================================================
|
||||
_mfdl_close: push bc
|
||||
call !!PFDL_Close
|
||||
pop bc
|
||||
ret
|
||||
|
||||
; =================================================================================================
|
||||
; Handler
|
||||
;
|
||||
; return - PFDL_OK
|
||||
; - PFDL_IDLE
|
||||
; - PFDL_BUSY
|
||||
; - PFDL_ERR_ERASE
|
||||
; - PDFL_ERR_MARGIN
|
||||
; - PFDL_ERR_WRITE
|
||||
; =================================================================================================
|
||||
_mfdl_handler: push bc
|
||||
call !!PFDL_Handler
|
||||
pop bc
|
||||
ret
|
||||
|
||||
; =================================================================================================
|
||||
; Get Version String - Obtains the version information of the Data Flash Library Type 04.
|
||||
; =================================================================================================
|
||||
_mfdl_version: call !!PFDL_GetVersionString
|
||||
ret
|
||||
|
||||
; =================================================================================================
|
||||
; Execute
|
||||
;
|
||||
; return - PFDL_OK
|
||||
; - PFDL_BUSY
|
||||
; - PFDL_ERR_ERASE
|
||||
; - PDFL_ERR_MARGIN
|
||||
; - PFDL_ERR_WRITE
|
||||
; =================================================================================================
|
||||
mfdl_execute: push bc
|
||||
push de
|
||||
push hl
|
||||
|
||||
call !!PFDL_Execute
|
||||
br $2f
|
||||
|
||||
1: call !!PFDL_Handler
|
||||
2: cmp a, #PFDL_BUSY
|
||||
bz $1b
|
||||
|
||||
pop hl
|
||||
pop de
|
||||
pop bc
|
||||
ret
|
||||
|
||||
|
||||
; =================================================================================================
|
||||
; Blank check( u16 index, u16 length)
|
||||
; =================================================================================================
|
||||
_mfdl_check: push hl
|
||||
|
||||
movw hl, #req ; set req.index
|
||||
movw [hl +0], ax ;
|
||||
|
||||
clrw ax ; clear req.data pointer
|
||||
movw [hl +2], ax ;
|
||||
|
||||
movw ax, bc ; set req.length
|
||||
movw [hl +4], ax ;
|
||||
|
||||
mov a, #PFDL_CMD_BLANKCHECK_BYTES
|
||||
mov [hl +6], a
|
||||
|
||||
9: movw ax, hl
|
||||
call !mfdl_execute
|
||||
|
||||
pop hl
|
||||
ret
|
||||
|
||||
; =================================================================================================
|
||||
; Blank check( u16 index, u16 count)
|
||||
; =================================================================================================
|
||||
_mfdl_verify: push hl
|
||||
|
||||
movw hl, #req ; set req.index
|
||||
movw [hl +0], ax ;
|
||||
|
||||
clrw ax ; clear req.data pointer
|
||||
movw [hl +2], ax ;
|
||||
|
||||
movw ax, bc ; set req.length
|
||||
movw [hl +4], ax ;
|
||||
|
||||
mov a, #PFDL_CMD_IVERIFY_BYTES
|
||||
mov [hl +6], a
|
||||
|
||||
br $9b
|
||||
|
||||
; =================================================================================================
|
||||
; Erase ( u16 index)
|
||||
; =================================================================================================
|
||||
_mfdl_erase: push hl
|
||||
|
||||
movw hl, #req ; set req.index
|
||||
movw [hl +0], ax ;
|
||||
|
||||
clrw ax
|
||||
movw [hl +2], ax ; clear req.data pointer
|
||||
movw [hl +4], ax ; clear req.length
|
||||
|
||||
mov a, #PFDL_CMD_ERASE_BLOCK
|
||||
mov [hl +6], a
|
||||
|
||||
br $9b
|
||||
|
||||
|
||||
; =================================================================================================
|
||||
; Read( u16 index, u16 count, __near u8* data)
|
||||
; =================================================================================================
|
||||
_mfdl_read: push hl
|
||||
|
||||
movw hl, #req ; set req.index
|
||||
movw [hl +0], ax ;
|
||||
|
||||
movw ax, de ; set req.data pointer
|
||||
movw [hl +2], ax ;
|
||||
|
||||
movw ax, bc ; set req.length
|
||||
movw [hl +4], ax ;
|
||||
|
||||
mov a, #PFDL_CMD_READ_BYTES ; set req.command
|
||||
mov [hl +6], a ;
|
||||
|
||||
br $9b
|
||||
|
||||
; =================================================================================================
|
||||
; Write( u16 index, u16 count, __near u8* data)
|
||||
; =================================================================================================
|
||||
_mfdl_write: push hl
|
||||
|
||||
movw hl, #req ; set req.index
|
||||
movw [hl +0], ax ;
|
||||
|
||||
movw ax, de ; set req.data pointer
|
||||
movw [hl +2], ax ;
|
||||
|
||||
movw ax, bc ; set req.length
|
||||
movw [hl +4], ax ;
|
||||
|
||||
mov a, #PFDL_CMD_WRITE_BYTES ; set req.command
|
||||
mov [hl +6], a ;
|
||||
|
||||
br $9b
|
||||
|
||||
.end
|
||||
Reference in New Issue
Block a user