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Added resistor component with 3 different simulation model including Verilog-A

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Roka Miklos
2026-06-29 10:58:24 +02:00
parent 2562ba7a10
commit 5c458d5a63
13 changed files with 215 additions and 0 deletions
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circuit/ael/mr/mr_resistor.ael
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// ============================================================================
// Resitor item definition
// ============================================================================
create_item(
"mr_pas_r", // name
"Resistor (Custom Symbol)", // label
"R", // prefix
ITEM_DESIGN_INST, // attribute
-1, // priority
NULL, // icon name (for palette)
"Component Parameters", // dialog name
NULL, // dialog data
ComponentNetlistFmt,
"", // netlist data
ComponentAnnotFmt,
"", // symbol name (obsolete)
3, // artwork type (obsolete)
NULL, // artwork data (obsolete)
0, // extra attribute
// ====================================================================
// CORE PARAMETERS
// ====================================================================
create_parm(
"R", // name
"Resistance", // label
PARM_DOE | // attribs
PARM_REAL |
PARM_OPTIMIZABLE |
PARM_STATISTICAL,
"StdFormSet", // form set
RESISTANCE_UNIT, // unit
prm("StdForm","50 Ohm")), // default value
// ====================================================================
// PARASITIC MODEL PARAMETERS
// ====================================================================
create_parm(
"C",
"Parallel capacitance",
PARM_REAL,
"StdFormSet",
CAPACITANCE_UNIT,
prm("StdForm","0.1 pF")),
create_parm(
"L",
"Series inductance",
PARM_REAL,
"StdFormSet",
INDUCTANCE_UNIT,
prm("StdForm","1 nH")),
// ====================================================================
// VERILOGA MODEL PARAMETERS
// ====================================================================
create_parm(
"TC1",
"1st order temperature coefficient",
PARM_REAL | PARM_NO_DISPLAY,
"StdFormSet",
UNITLESS_UNIT,
prm("StdForm","0.0")),
create_parm(
"TC2",
"2nd order temperature coefficient",
PARM_REAL | PARM_NO_DISPLAY,
"StdFormSet",
UNITLESS_UNIT,
prm("StdForm","0.0")),
create_parm(
"Kf",
"Flicker noise coefficient",
PARM_REAL | PARM_NO_DISPLAY,
"StdFormSet",
UNITLESS_UNIT,
prm("StdForm","0.0")),
create_parm(
"Af",
"Flicker noise exponent (usually 1.0)",
PARM_REAL | PARM_NO_DISPLAY,
"StdFormSet",
UNITLESS_UNIT,
prm("StdForm","1.0"))
);
// ============================================================================
// Resitor item definition (Verilog)
// ============================================================================
create_item(
"mr_pas_r_va", // name
"Resistor (Custom Symbol)", // label
"R", // prefix
0, // attribute
-1, // priority
NULL, // icon name (for palette)
"Component Parameters", // dialog name
NULL, // dialog data
ComponentNetlistFmt,
"mr_pas_r_va", // netlist data -> model name
ComponentAnnotFmt,
"", // symbol name (obsolete)
0, // artwork type (obsolete)
NULL, // artwork data (obsolete)
0,
// ====================================================================
// CORE PARAMETERS
// ====================================================================
create_parm(
"R", // name
"Resistance", // label
PARM_DOE | // attribs
PARM_REAL |
PARM_OPTIMIZABLE |
PARM_STATISTICAL,
"StdFormSet", // form set
RESISTANCE_UNIT, // unit
prm("StdForm","50 Ohm")), // default value
// ====================================================================
// VERILOGA MODEL PARAMETERS
// ====================================================================
create_parm(
"TC1",
"1st order temperature coefficient",
PARM_REAL | PARM_NO_DISPLAY,
"StdFormSet",
UNITLESS_UNIT,
prm("StdForm","0.0")),
create_parm(
"TC2",
"2nd order temperature coefficient",
PARM_REAL | PARM_NO_DISPLAY,
"StdFormSet",
UNITLESS_UNIT,
prm("StdForm","0.0")),
create_parm(
"Kf",
"Flicker noise coefficient",
PARM_REAL | PARM_NO_DISPLAY,
"StdFormSet",
UNITLESS_UNIT,
prm("StdForm","0.0")),
create_parm(
"Af",
"Flicker noise exponent (usually 1.0)",
PARM_REAL | PARM_NO_DISPLAY,
"StdFormSet",
UNITLESS_UNIT,
prm("StdForm","1.0"))
);